The TL16C752D is a dual universal asynchronous receiver transmitter (UART) with 64-byte FIFOs, automatic hardware and software flow control, and data rates up to 3 Mbps. The device offers enhanced features. It has a transmission character control register (TCR) that stores received FIFO threshold level to start or stop transmission during hardware and software flow control.
With the FIFO RDY register, the software gets the status of TXRDY or RXRDY for all two ports in one access. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The TL16C752D incorporates the functionality of two UARTs, each UART having its own register set and FIFOs.
The two UARTs share only the data bus interface and clock source, otherwise they operate independently. Another name for the UART function is asynchronous communications element (ACE), and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that two such devices are incorporated into the TL16C752D device.
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|Number of channels (#)|
|Rx FIFO trigger levels (#)|
|Tx FIFO Trigger Levels (#)|
|Programmable FIFO trigger levels|
|Baud rate (max) at Vcc = 1.8 V & with 16X sampling (Mbps)|
|Baud rate (max) at Vcc = 2.5 V & with 16X sampling (Mbps)|
|Baud rate (max) at Vcc = 3.3 V & with 16X sampling (Mbps)|
|Baud rate (max) at Vcc = 5.0 V & with 16X sampling (Mbps)|
|Operating voltage (V)|
|Operating temperature range (C)|
|1.62 to 5.5||
|1.62 to 5.5|
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|0 to 70||-40 to 85||
-40 to 105
-40 to 110
-55 to 110
0 to 70
-40 to 85
|-40 to 105||-40 to 105|
|TQFP | 48||
PLCC | 44
TQFP | 48
|LQFP | 48||
TQFP | 48
VQFN | 32
|TQFP | 48||TQFP | 48|
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