SBOS694A December   2013  – November 2015 TLV3691

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Nano-Power
      2. 7.4.2 Rail-to-Rail Inputs
      3. 7.4.3 Push-Pull Output
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Comparator Inputs
      2. 8.1.2 External Hysteresis
        1. 8.1.2.1 Inverting Comparator With Hysteresis
        2. 8.1.2.2 Noninverting Comparator With Hysteresis
      3. 8.1.3 Capacitive Loads
      4. 8.1.4 Setting the Reference Voltage
    2. 8.2 Typical Application
      1. 8.2.1 Window Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Overvoltage and Undervoltage Detection
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TLV3691 comparators feature rail-to-rail inputs and outputs on supply voltages as low as 0.9 V. The push-pull output stage is optimal for reduced power budget applications and features no shoot-through current. Low minimum supply voltages, common-mode input range beyond supply rails, and a typical supply current of 75 nA make the TLV3691 an excellent candidate for battery-operated and portable, handheld designs.

8.1.1 Comparator Inputs

The TLV3691 is a rail-to-rail input comparator, with an input common-mode range that exceeds the supply rails by 100 mV for both positive and negative supplies. The device is designed to prevent phase inversion when the input pins exceed the supply voltage. Figure 27 shows the device response when input voltages exceed the supply, resulting in no phase inversion.

TLV3691 C030_SBOS694.png Figure 27. No Phase Inversion: Comparator Response to Input Voltage (Propagation Delay Included)

8.1.2 External Hysteresis

The device hysteresis transfer curve is shown in Figure 28. This curve is a function of three components: VTH, VOS, and VHYST.

  • VTH is the actual set voltage or threshold trip voltage.
  • VOS is the internal offset voltage between VIN+ and VIN–. This voltage is added to VTH to form the actual trip point at which the comparator must respond to change output states.
  • VHYST is the internal hysteresis (or trip window) that is designed to reduce comparator sensitivity to noise
    (17 mV for the TLV3691).

TLV3691 ai_hyst_transfer_bos694.gif Figure 28. Hysteresis Transfer Curve

8.1.2.1 Inverting Comparator With Hysteresis

The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply voltage (VCC), as shown in Figure 29. When VIN at the inverting input is less than VA, the output voltage is high (for simplicity, assume VO switches as high as VCC). The three network resistors can be represented as R1 || R3 in series with R2. Equation 1 defines the high-to-low trip voltage (VA1).

Equation 1. TLV3691 q_va1_bos561.gif

When VIN is greater than VA, the output voltage is low, very close to ground. In this case, the three network resistors can be presented as R2 || R3 in series with R1. Use Equation 2 to define the low to high trip voltage (VA2).

Equation 2. TLV3691 q_va2_bos561.gif

Equation 3 defines the total hysteresis provided by the network.

Equation 3. TLV3691 q_delta_va_bos561.gif
TLV3691 ai_inverting_bos561.gif Figure 29. TLV3691 in an Inverting Configuration With Hysteresis

8.1.2.2 Noninverting Comparator With Hysteresis

A noninverting comparator with hysteresis requires a two-resistor network, as shown in Figure 30, and a voltage reference (VREF) at the inverting input. When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise to VIN1. Use Equation 4 to calculate VIN1.

Equation 4. TLV3691 q_vin1_bos694.gif

When VIN is high, the output is also high. For the comparator to switch back to a low state, VIN must drop to VIN2 such that VA is equal to VREF. Use Equation 5 to calculate VIN2.

Equation 5. TLV3691 q_vin2_bos561.gif

The hysteresis of this circuit is the difference between VIN1 and VIN2, as shown in Equation 6.

Equation 6. TLV3691 q_delta_vin_bos561.gif
TLV3691 ai_noninverting_bos561.gif Figure 30. TLV3691 in a Noninverting Configuration With Hysteresis

8.1.3 Capacitive Loads

Under reasonable capacitive loads, the device maintains specified propagation delay (see Typical Characteristics). However, excessive capacitive loading under high switching frequencies may increase supply current, propagation delay, or induce decreased slew rate.

8.1.4 Setting the Reference Voltage

Using a stable reference when setting the transition point for the device is important. The REF3312, as shown in Figure 31, provides a 1.25-V reference voltage with low drift and only 3.9 μA of quiescent current.

TLV3691 ai_refvoltage_bos694.gif Figure 31. Reference Voltage for the TLV3691

8.2 Typical Application

8.2.1 Window Comparator

Window comparators are commonly used to detect undervoltage and overvoltage conditions. Figure 32 illustrates a simple window comparator circuit.

TLV3691 ai_windowcomp_bos694.gif Figure 32. Window Comparator

8.2.1.1 Design Requirements

  • Alert when an input signal is less than 1.25 V
  • Alert when an input signal is greater than 3.3 V
  • Alert signal is active low
  • Operate from 5-V power supply
  • Consume less than 1 µA over the temperature range from –40°C to 125°C

8.2.1.2 Detailed Design Procedure

Configure the circuit as shown in Figure 32. Connect V+ to a 5-V power supply. Connect V- to ground. Connect VTH- to a 1.25-V voltage source; this can be a low power voltage reference such as REF3312. Connect VTH+ to a 3.3-V voltage source; this can be a low power voltage reference such as REF3333. Apply an input voltage at VIN. VOUT will be low when VIN is less than 1.25 V or greater than 3.3 V. VOUT will be high when VIN is in the range of 1.25 V to 3.3 V.

8.2.1.3 Application Curve

TLV3691 D052_SBOS694.gif Figure 33. Window Comparator Results

8.2.2 Overvoltage and Undervoltage Detection

The TLV3691 can be easily configured as and overvoltage and undervoltage detection circuit. Figure 34 illustrates an overvoltage and undervoltage detection circuit. This circuit can be configured to detect the validity of a bus voltage source. The outputs of the TLV3691 will transition low when the bus voltage is out of range.

  • A bus voltage overvoltage condition is indicated when VOV is low. VOV will transition low according to Equation 7.
  • Equation 7. TLV3691 OV_Detect_EQ_SBOS694.gif
  • A bus voltage undervoltage condition is indicated when VUV is low. VUV will transition low according to Equation 8.
  • Equation 8. TLV3691 UV_Detect_EQ_SBOS694.gif
  • VOV and VUV will both be high when the bus voltage is within the desired range determined by Equation 7 and Equation 8.
TLV3691 OV_UV_Detection_SBOS694.gif Figure 34. Overvoltage and Undervoltage Detection