SBOS839J March   2017  – September 2019 TLV9061 , TLV9062 , TLV9064

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Single-Pole, Low-Pass Filter
      2.      Small-Signal Overshoot vs Load Capacitance
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions: TLV9061
    2.     Pin Functions: TLV9061S
    3.     Pin Functions: TLV9062
    4.     Pin Functions: TLV9062S
    5.     Pin Functions: TLV9064
    6.     Pin Functions: TLV9064S
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information: TLV9061
    5. 8.5  Thermal Information: TLV9061S
    6. 8.6  Thermal Information: TLV9062
    7. 8.7  Thermal Information: TLV9062S
    8. 8.8  Thermal Information: TLV9064
    9. 8.9  Thermal Information: TLV9064S
    10. 8.10 Electrical Characteristics
    11. 8.11 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Rail-to-Rail Input
      2. 9.3.2 Rail-to-Rail Output
      3. 9.3.3 EMI Rejection
      4. 9.3.4 Overload Recovery
      5. 9.3.5 Shutdown Function
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Low-Side Current Sense Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Input and ESD Protection
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.11 Typical Characteristics

at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)
TLV9061 TLV9062 TLV9064 C001_SBOS637.png
Figure 1. Offset Voltage Production Distribution
TLV9061 TLV9062 TLV9064 C003_SBOS839.png
Figure 3. Offset Voltage vs Temperature
TLV9061 TLV9062 TLV9064 C004_SBOS839.png
VS = 1.8 V to 5.5 V
Figure 5. Offset Voltage vs Power Supply
TLV9061 TLV9062 TLV9064 C022_SBOS839.png
RL = 2 kΩ
Figure 7. Open-Loop Gain vs Temperature
TLV9061 TLV9062 TLV9064 C008_SBOS839.png
Figure 9. Input Bias Current vs Temperature
TLV9061 TLV9062 TLV9064 C011_SBOS839.png
Figure 11. CMRR and PSRR vs Frequency
(Referred to Input)
TLV9061 TLV9062 TLV9064 C016_SBOS839.png
VCM = (V–) – 0.1 V to (V+) – 1.4 V
TA= –40°C to 125°C RL= 10 kΩ VS = 5.5 V
Figure 13. CMRR vs Temperature
TLV9061 TLV9062 TLV9064 C014_SBOS839.png
VS = 1.8 V to 5.5 V
Figure 15. 0.1-Hz to 10-Hz Input Voltage Noise
TLV9061 TLV9062 TLV9064 C017_SBOS839.png
VS = 5.5 V VCM = 2.5 V RL = 2 kΩ
VOUT = 0.5 VRMS BW = 80 kHz G = +1
Figure 17. THD + N vs Frequency
TLV9061 TLV9062 TLV9064 C019_SBOS839.png
VS = 5.5 V VCM = 2.5 V RL = 2 kΩ
G = –1 BW = 80 kHz f = 1 kHz
Figure 19. THD + N vs Amplitude
TLV9061 TLV9062 TLV9064 C021_SBOS839.png
Figure 21. Quiescent Current vs Temperature
TLV9061 TLV9062 TLV9064 C025_SBOS839.png
V+ = 2.75 V V– = –2.75 V G = +1 V/V
VOUT step = 100 mVp-p RL = 10 kΩ
Figure 23. Small-Signal Overshoot vs Load Capacitance
TLV9061 TLV9062 TLV9064 C036_SBOS839.png
V+ = 2.75 V V– = –2.75 V
Figure 25. No Phase Reversal
TLV9061 TLV9062 TLV9064 C030_SBOS839.png
V+ = 2.75 V V– = –2.75 V G = 1 V/V
Figure 27. Small-Signal Step Response
TLV9061 TLV9062 TLV9064 C034_SBOS839.png
Figure 29. Short-Circuit Current vs Temperature
TLV9061 TLV9062 TLV9064 C041_SBOS839.png
PRF = –10 dBm
Figure 31. Electromagnetic Interference Rejection Ratio Referred to Noninverting Input (EMIRR+) vs Frequency
TLV9061 TLV9062 TLV9064 C037_SBOS839.png
VS = 5.5 V
Figure 33. Phase Margin vs Capacitive Load
TLV9061 TLV9062 TLV9064 C032_SBOS839.png
Figure 35. Large Signal Settling Time (Positive)
TLV9061 TLV9062 TLV9064 C002_SBOS839.png
TA = –40°C to 125°C
Figure 2. Offset Voltage Drift Distribution
TLV9061 TLV9062 TLV9064 C005_SBOS839.png
V+ = 2.75 V V– = –2.75 V
Figure 4. Offset Voltage vs Common-Mode Voltage
TLV9061 TLV9062 TLV9064 C006_SBOS839.png
CL = 10 pF
Figure 6. Open-Loop Gain and Phase vs Frequency
TLV9061 TLV9062 TLV9064 C007_SBOS839.png
Figure 8. Closed-Loop Gain vs Frequency
TLV9061 TLV9062 TLV9064 C009_SBOS839.png
V+ = 2.75 V V– = –2.75 V
Figure 10. Output Voltage Swing vs Output Current
TLV9061 TLV9062 TLV9064 C012_SBOS839.png
VS = 5.5 V VCM = –0.1 V to 5.6 V TA= –40°C to 125°C
RL= 10 kΩ
Figure 12. CMRR vs Temperature
TLV9061 TLV9062 TLV9064 C013_SBOS839.png
VS = 1.8 V to 5.5 V
Figure 14. PSRR vs Temperature
TLV9061 TLV9062 TLV9064 C015_SBOS839.png
Figure 16. Input Voltage Noise Spectral Density vs Frequency
TLV9061 TLV9062 TLV9064 C018_SBOS839.png
VS = 5.5 V RL = 2 kΩ G = +1
VCM = 2.5 V BW = 80 kHz f = 1 kHz
Figure 18. THD + N vs Amplitude
TLV9061 TLV9062 TLV9064 C020_SBOS839.png
Figure 20. Quiescent Current vs Supply Voltage
TLV9061 TLV9062 TLV9064 C024_SBOS839.png
Figure 22. Open-Loop Output Impedance vs Frequency
TLV9061 TLV9062 TLV9064 C026_SBOS839.png
V+ = 2.75 V V– = –2.75 V G = –1 V/V
VOUT step = 100 mVp-p RL = 10 kΩ
Figure 24. Small-Signal Overshoot vs Load Capacitance
TLV9061 TLV9062 TLV9064 C028_SBOS839.png
V+ = 2.75 V V– = –2.75 V G = –10 V/V
Figure 26. Overload Recovery
TLV9061 TLV9062 TLV9064 C031_SBOS839.png
V+ = 2.75 V V– = –2.75 V CL = 100 pF
G = 1 V/V
Figure 28. Large-Signal Step Response
TLV9061 TLV9062 TLV9064 C035_SBOS839.png
RL = 10 k‎Ω CL = 10 pF
Figure 30. Maximum Output Voltage vs Frequency and Supply Voltage
TLV9061 TLV9062 TLV9064 C038_SBOS839.png
V+ = 2.75 V V– = –2.75 V
Figure 32. Channel Separation vs Frequency
TLV9061 TLV9062 TLV9064 C023_SBOS839.png
VS = 5.5 V
Figure 34. Open Loop Voltage Gain vs Output Voltage
TLV9061 TLV9062 TLV9064 C033_SBOS839.png
Figure 36. Large Signal Settling Time (Negative)