TMS320F28377S (ACTIVE)

Single-Core Delfino Microcontroller

Single-Core Delfino Microcontroller - TMS320F28377S


The Delfino™ TMS320F2837xS is a powerful 32-bit floating-point microcontroller unit (MCU) designed for advanced closed-loop control applications such as industrial motor drives; solar inverters and digital power; electrical vehicles and transportation; and sensing and signal processing. Complete development packages for digital power and industrial drives are available as part of the powerSUITE and DesignDRIVE initiatives.

The real-time control subsystem is based on TI’s 32-bit C28x floating-point CPU, which provides 200 MHz of signal processing performance. The C28x CPU is further boosted by the new TMU accelerator, which enables fast execution of algorithms with trigonometric operations common in transforms and torque loop calculations; and the VCU accelerator, which reduces the time for complex math operations common in encoded applications.

The F2837xS microcontroller family features a CLA real-time control coprocessor. The CLA is an independent 32-bit floating-point processor that runs at the same speed as the main CPU. The CLA responds to peripheral triggers and executes code concurrently with the main C28x CPU. This parallel processing capability can effectively double the computational performance of a real-time control system. By using the CLA to service time-critical functions, the main C28x CPU is free to perform other tasks, such as communications and diagnostics.

The TMS320F2837xS supports up to 1MB (512KW) of onboard flash memory with error correction code (ECC) and up to 164KB (82KW) of SRAM. Two 128-bit secure zones are also available on the CPU for code protection.

Performance analog and control peripherals are also integrated on the F2837xS MCU to further enable system consolidation. Four independent 16-bit ADCs provide precise and efficient management of multiple analog signals, which ultimately boosts system throughput. The new sigma-delta filter module (SDFM) works in conjunction with the sigma-delta modulator to enable isolated current shunt measurements. The Comparator Subsystem (CMPSS) with windowed comparators allows for protection of power stages when current limit conditions are exceeded or not met. Other analog and control peripherals include DACs, PWMs, eCAPs, eQEPs, and other peripherals.

Peripherals such as EMIFs, CAN modules (ISO 11898-1/CAN 2.0B-compliant), and a new uPP interface extend the connectivity of the F2837xS. The uPP interface is a new feature of the C2000™ MCUs and supports high-speed parallel connection to FPGAs or other processors with similar uPP interfaces. Lastly, a USB 2.0 port with MAC and PHY lets users easily add universal serial bus (USB) connectivity to their application.



  • TMS320C28x 32-Bit CPU
    • 200 MHz
    • IEEE 754 Single-Precision Floating-Point Unit (FPU)
    • Trigonometric Math Unit (TMU)
    • Viterbi/Complex Math Unit (VCU-II)
  • Programmable Control Law Accelerator (CLA)
    • 200 MHz
    • IEEE 754 Single-Precision Floating-Point Instructions
    • Executes Code Independently of Main CPU
  • On-Chip Memory
    • 512KB (256KW) or 1MB (512KW) of Flash (ECC-Protected)
    • 132KB (66KW) or 164KB (82KW) of RAM
      (ECC-Protected or Parity-Protected)
    • Dual-Zone Security Supporting Third-Party Development
    • Unique Identification Number
  • Clock and System Control
    • Two Internal Zero-Pin 10-MHz Oscillators
    • On-Chip Crystal Oscillator
    • Windowed Watchdog Timer Module
    • Missing Clock Detection Circuitry
  • 1.2-V Core, 3.3-V I/O Design
  • System Peripherals
    • Two External Memory Interfaces (EMIFs) With ASRAM and SDRAM Support
    • 6-Channel Direct Memory Access (DMA) Controller
    • Up to 169 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins With Input Filtering
    • Expanded Peripheral Interrupt Controller (ePIE)
    • Multiple Low-Power Mode (LPM) Support With External Wakeup
  • Communications Peripherals
    • USB 2.0 (MAC + PHY)
    • Support for 12-Pin 3.3 V-Compatible Universal Parallel Port (uPP) Interface
    • Two Controller Area Network (CAN) Modules (Pin-Bootable)
    • Three High-Speed (up to 50-MHz) SPI Ports (Pin-Bootable)
    • Two Multichannel Buffered Serial Ports (McBSPs)
    • Four Serial Communications Interfaces (SCI/UART) (Pin-Bootable)
    • Two I2C Interfaces (Pin-Bootable)
  • Analog Subsystem
    • Up to Four Analog-to-Digital Converters (ADCs)
      • 16-Bit Mode
        • 1.1 MSPS Each (up to 4.4-MSPS System Throughput)
        • Differential Inputs
        • Up to 12 External Channels
      • 12-Bit Mode
        • 3.5 MSPS Each (up to 14-MSPS System Throughput)
        • Single-Ended Inputs
        • Up to 24 External Channels
      • Single Sample-and-Hold (S/H) on Each ADC
      • Hardware-Integrated Post-Processing of ADC Conversions
        • Saturating Offset Calibration
        • Error From Setpoint Calculation
        • High, Low, and Zero-Crossing Compare, With Interrupt Capability
        • Trigger-to-Sample Delay Capture
    • Eight Windowed Comparators With 12-Bit Digital-to-Analog Converter (DAC) References
    • Three 12-Bit Buffered DAC Outputs
  • Enhanced Control Peripherals
    • 24 PWM Channels With Enhanced Features
    • 16 High-Resolution Pulse Width Modulator (HRPWM) Channels
      • High Resolution on Both A and B Channels of 8 PWM Modules
      • Dead-Band Support (on Both Standard and High Resolution)
    • Six Enhanced Capture (eCAP) Modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) Modules
    • Eight Sigma-Delta Filter Module (SDFM) Input Channels, 2 Parallel Filters per Channel
      • Standard SDFM Data Filtering
      • Comparator Filter for Fast Action for Out of Range
  • Configurable Logic Block (CLB)
    • Augments Existing Peripheral Capability
    • Supports Position Manager Solutions
  • Package Options:
    • Lead-Free, Green Packaging
    • 337-Ball New Fine Pitch Ball Grid Array (nFBGA) [ZWT Suffix]
    • 176-Pin PowerPAD™ Thermally Enhanced Low-Profile Quad Flatpack (HLQFP)
      [PTP Suffix]
    • 100-Pin PowerPAD Thermally Enhanced Thin Quad Flatpack (HTQFP) [PZP Suffix]
  • Temperature Options:
    • T: –40ºC to 105ºC Junction
    • S: –40ºC to 125ºC Junction
    • Q: –40ºC to 125ºC Free-Air
      (AEC Q100 Qualification for Automotive Applications)

All trademarks are the property of their respective owners.

View more

Parametrics Compare all products in Delfino Premium Performance MCUs

Total Processing (MIPS)
Frequency (MHz)
Flash (KB)
ADC Resolution
ADC (Ch)
Sigma-Delta Filter
PWM (Ch)
High Resolution PWM(Ch)
CAN (#)
DMA (Ch)
Operating Temperature Range (C)
# of ADC Modules
Analog to Digital Converter (ADC)
Comparators (#)
Frequency per CLA (MHz)
Processing Accelerators
PWM Technology Type
Security Enabler
TMS320F28377S TMS320F28374S TMS320F28375S TMS320F28376S TMS320F28379S
400     400     400     400     400    
200     200     200     200     200    
1024     512     1024     512     1024    
164     132     164     132     164    
16-bit /12-bit     12-bit     12-bit     16-bit /12-bit     16-bit /12-bit    
8     8     8     8     8    
3     3     3     3     3    
24     24     24     24     24    
16     16     16     16     16    
3     3     3     3     3    
4     4     4     4     4    
2     2     2     2     2    
2     2     2     2     2    
6     6     6     6     6    
1 32/16-Bit
1 16-Bit    
1 32/16-Bit
1 16-Bit    
1 32/16-Bit
1 16-Bit    
1 32/16-Bit
1 16-Bit    
1 32/16-Bit
1 16-Bit    
2     2     2     2     2    
1     1     1     1