SLVSDL1 April   2017 TPD2S300

PRODUCTION DATA.  

1. 1 Features
2. 2 Applications
3. 3 Description
4. 4 Revision History
5. 5 Pin Configuration and Functions
6. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings—JEDEC Specification
   3. 6.3 ESD Ratings—IEC Specification
   4. 6.4 Recommended Operating Conditions
   5. 6.5 Thermal Information
   6. 6.6 Electrical Characteristics
   7. 6.7 Timing Requirements
   8. 6.8 Typical Characteristics
7. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 2-Channels of Short-to-VBUS Overvoltage Protection (CC1, CC2 Pins): 24-VDC Tolerant
      2. 7.3.2 2-Channels of IEC61000-4-2 ESD Protection (CC1, CC2 Pins)
      3. 7.3.3 Low Quiescent Current: 3.23 µA (Typical), VPWR, VM = 3.3 V
      4. 7.3.4 CC1, CC2 Overvoltage Protection FETs 200 mA Capable for Passing VCONN Power
      5. 7.3.5 CC Dead Battery Resistors Integrated for Handling Dead Battery Use Case in Mobile Devices
      6. 7.3.6 1.4-mm × 1.4-mm WCSP Package
   4. 7.4 Device Functional Modes
8. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Smart-Phone Application
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
            1. 8.2.1.2.1 VBIAS Capacitor Selection
            2. 8.2.1.2.2 Dead Battery Operation
            3. 8.2.1.2.3 CC Line Capacitance
            4. 8.2.1.2.4 FLT Pin Operation
            5. 8.2.1.2.5 VCONN Operation
            6. 8.2.1.2.6 Low Quiescent Current
         3. 8.2.1.3 Application Curves
      2. 8.2.2 Laptop Application
         1. 8.2.2.1 Design Requirements
         2. 8.2.2.2 Detailed Design Procedure
            1. 8.2.2.2.1 VBIAS Capacitor Selection
            2. 8.2.2.2.2 Dead Battery Operation
            3. 8.2.2.2.3 CC Line Capacitance
            4. 8.2.2.2.4 FLT Pin Operation
            5. 8.2.2.2.5 VCONN Operation
         3. 8.2.2.3 Application Curves
      3. 8.2.3 Power Adaptor Application
         1. 8.2.3.1 Design Requirements
         2. 8.2.3.2 Detailed Design Procedure
            1. 8.2.3.2.1 VBIAS Capacitor Selection
            2. 8.2.3.2.2 Dead Battery Operation
            3. 8.2.3.2.3 CC Line Capacitance
            4. 8.2.3.2.4 FLT Pin Operation
            5. 8.2.3.2.5 VCONN Operation
         3. 8.2.3.3 Application Curves
9. 9 Power Supply Recommendations
10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
11. 11Device and Documentation Support
    1. 11.1 Documentation Support
       1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
12. 12Mechanical, Packaging, and Orderable Information