SLVSE25A July   2017  – October 2017 TPS2001D

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: TJ = TA = 25°C
    6. 7.6 Electrical Characteristics: -40°C ≤ TJ ≤ 125°C
    7. 7.7 Timing Requirements: TJ = TA = 25°C
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Enable
      3. 8.3.3 Internal Charge Pump
      4. 8.3.4 Current Limit
      5. 8.3.5 FLT
      6. 8.3.6 Output Discharge
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input and Output Capacitance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation and Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Voltage on IN, OUT, EN, FLT (4) –0.3 6 V
Voltage from IN to OUT –6 6 V
Maximum junction temperature, TJ Internally Limited
Storage temperature, Tstg –60 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Absolute maximum ratings apply over recommended junction temperature range.
(3) Voltages are with respect to GND unless otherwise noted.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
IEC 61000-4-2 contact discharge ±8000
IEC 61000-4-2 air-gap discharge(3) ±15000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) VOUT was surged on a PCB with input and output bypassing per the Typical Application Diagram on the first page (except input capacitor was 22 µF) with no device failures.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VIN Input voltage, IN 4.5 5.5 V
VEN Input voltage, EN 0 5.5 V
VIH High-level input voltage, EN DGK 2 V
DBV 1.8
VIL Low-level input voltage, EN 0.7 V
IOUT Continuous output current, OUT(1) 2 A
TJ Operating junction temperature –40 125 °C
IFLT Sink current into FLT 0 5 mA
(1) Some package and current rating may request an ambient temperature derating of 85°C.

7.4 Thermal Information

THERMAL METRIC(1) TPS2001D TPS2001D UNIT
DBV
(SOT-23)		 DGK
(VSSOP)
5 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 220.4 205.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 89.7 94.3 °C/W
RθJB Junction-to-board thermal resistance 46.9 126.9 °C/W
ψJT Junction-to-top characterization parameter 5.2 24.7 °C/W
ψJB Junction-to-board characterization parameter 46.2 125.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W
RθJACustom See Power DIssipation and Junction Temperature 134.9 110.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics: TJ = TA = 25°C

Unless otherwise noted: VIN = 5 V, VEN = VIN, IOUT = 0 A. See Device Comparison Table for the rated current of each part number. Parametrics over a wider operational range are shown in Electrical Characteristics: –40°C ≤ TJ ≤ 125°C(1).
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
POWER SWITCH
RDS(on) Input – output resistance 2-A rated output, 25°C DGK 72 84 mΩ
2-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DGK 72 98 mΩ
2-A rated output, 25°C DBV 66 77 mΩ
2-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DBV 66 90 mΩ
CURRENT LIMIT
IOS(3) Current limit,
See Figure 6		 2-A rated output 2.35 2.9 3.4 A
SUPPLY CURRENT
ISD Supply current, switch disabled IOUT = 0 A 0.01 1 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V, IOUT = 0 A 2
ISE Supply current, switch enabled IOUT = 0 A 60 70 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V, IOUT = 0 A 85
Ilkg Leakage current VOUT = 0 V, VIN = 5 V, disabled, measure IVIN 0.05 1 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 0 V,
VIN = 5 V, disabled, measure IVIN		 2
IREV Reverse leakage current VOUT = 5 V, VIN = 0 V, measure IVOUT 0.1 1 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 5 V, VIN = 0 V, measure IVOUT 5
OUTPUT DISCHARGE
RPD Output pulldown resistance(2) VIN = VOUT = 5 V, disabled 400 470 600 Ω
(1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature
(2) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
(3) See Current Limit section for explanation of this parameter.

7.6 Electrical Characteristics: –40°C ≤ TJ ≤ 125°C

Unless otherwise noted:4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN, IOUT = 0 A, typical values are at 5 V and 25°C.
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
POWER SWITCH
RDS(ON) Input – output resistance 2-A rated output DGK 72 112 mΩ
2-A rated output DBV 66 106 mΩ
ENABLE INPUT (EN)
Threshold Input rising DGK 1 1.45 2 V
DBV 1 1.45 1.8
Hysteresis 0.07 0.13 0.2 V
Leakage current VEN = 0 V or 5.5 V –1 0 1 µA
CURRENT LIMIT
IOS(3) Current limit,
See Figure 20		 2-A rated output 2.3 2.9 3.6 A
tIOS Short-circuit response time(2) VIN = 5 V (see Figure 6),
One-half full load → RSHORT = 50 mΩ,
Measure from application to when current falls below 120% of final value		 2 µs
SUPPLY CURRENT
ISD Supply current, switch disabled IOUT = 0 A 0.01 10 µA
ISE Supply current, switch enabled IOUT = 0 A 65 90 µA
IREV Reverse leakage current VOUT = 5.5 V, VIN = 0 V, measure IVOUT 0.2 20 µA
UNDERVOLTAGE LOCKOUT
VUVLO Rising threshold VIN↑ 3.5 3.75 4 V
Hysteresis(2) VIN↓ 0.14 V
FLT
Output low voltage, FLT IFLT = 1 mA 0.2 V
OFF-state leakage VFLT = 5.5 V 1 µA
tFLT FLT deglitch FLT assertion or deassertion deglitch 6 9 12 ms
OUTPUT DISCHARGE
RPD Output pulldown resistance VIN = 4 V, VOUT = 5 V, disabled 350 560 1200 Ω
VIN = 5 V, VOUT = 5 V, disabled 300 470 800
THERMAL SHUTDOWN
Rising threshold (TJ) In current limit 135 °C
Not in current limit 155
Hysteresis (2) 20
(1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature
(2) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
(3) See Current Limit for explanation of this parameter.

7.7 Timing Requirements: TJ = TA = 25°C

MIN NOM MAX UNIT
ENABLE INPUT (EN)
tON Turnon time VIN = 5 V, CL = 1 µF, RL = 100 Ω, EN ↑.
See Figure 1, Figure 3, and Figure 4		 1.2 1.7 2.2 ms
tOFF Turnoff time VIN = 5 V, CL = 1 µF, RL = 100 Ω, EN ↓.
See Figure 1, Figure 3, and Figure 4		 1.7 2.1 2.5 ms
tR Rise time, output CL = 1 µF, RL = 100 Ω, VIN = 5 V. See Figure 2 0.5 0.7 1 ms
tF Fall time, output CL = 1 µF, RL = 100 Ω, VIN = 5 V. See Figure 2 0.3 0.43 0.55 ms
TPS2001D tst_load_lvsau6.gif Figure 1. Output Rise and Fall Test Load
TPS2001D pwr_on_off_lvsau6.gif Figure 2. Power-On and Power-Off Timing
TPS2001D enable_t_hi_lvsau6.gif Figure 3. Enable Timing, Active High Enable
TPS2001D enable_t_low_lvsau6.gif Figure 4. Enable Timing, Active Low Enable
TPS2001D short_cir_lvsau6.gif Figure 5. Output Short-Circuit Parameters
TPS2001D cur_limit_lvsau6.gif Figure 6. Output Characteristic Showing Current Limit

7.8 Typical Characteristics

TPS2001D G019_Deglitch_vs_Temp.png
Figure 7. Deglitch Period (TFLT) vs Temperature
TPS2001D G021_Ios_vs_Tj_SLVSE25.gif
Figure 9. Short Circuit Current (IOS) vs Temperature
TPS2001D G023_Isd_vs_Tj.png
Figure 11. Disabled Supply Current (ISD) vs Temperature
TPS2001D G025_Irev_vs_Vout.png
Figure 13. Reverse Leakage Current (IREV) vs Output Voltage
TPS2001D G027_Ise_vs_Vin.png
Figure 15. Enabled Supply Current (ISE) vs Input Voltage
TPS2001D G029_tr_vs_Tj_SLVSE25.gif
Figure 17. Output Rise Time (TR) vs Temperature
TPS2001D G020_Idscg_vs_Vout.png
Figure 8. Output Discharge Current vs Output Voltage
TPS2001D G022_Irev_vs_Tj.png
Figure 10. Reverse Leakage Current (IREV) vs Temperature
TPS2001D G024_Isd_vs_Vin.png
Figure 12. Disabled Supply Current (ISD) vs Input Voltage
TPS2001D G026_Ise_vs_Tj.png
Figure 14. Enabled Supply Current (ISE) vs Temperature
TPS2001D G028_tf_vs_Tj_SLVSE25.gif
Figure 16. Output Fall Time (TF) vs Temperature
TPS2001D G030_Rdson_vs_Tj_SLVSE25.gif
Figure 18. Input-Output Resistance (RDS(ON)) vs Temperature