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Complete DDR, DDR2, DDR3, DDR3L, LPDDR3 and DDR4 power solution synchronous buck controller, 3A LDO


Models (3)

Title Category Type Date
TPS51116 PSpice Transient Model (Rev. B) PSpice Model ZIP 25 Aug 2011
TPS51116 TINA-TI Transient Spice Model TINA-TI Spice Model ZIP 26 May 2011
TPS51116 TINA-TI Transient Reference Design TINA-TI Reference Design TSC 26 May 2011

Design kits & evaluation modules (2)

Name Part# Type
DM388 DaVinci Digital Media Processor Evaluation Module TMDXEVM388 Evaluation Modules & Boards
TPS51116 Memory Power Solution, Synchronous Buck Controller Evaluation Module TPS51116EVM-001 Evaluation Modules & Boards

Reference designs

Altera Cyclone III FPGA Power Management Reference Design

The Cyclone III power management design is a complete, non-isolated power solution and provides all 5 required rails for powering the FPGA. The design also includes complete power solutions for DDR Memory VTT and VDDQ rails and USB power. This design is optimized to power the Altera 3C25F324 starter (...)

View the Important Notice for reference designs covering authorized use, intellectual property matters and disclaimers.

Description Part Number Company Tool Type
Complete Power Solution for DDR or DDR2 Memory Applications PMP1516 Texas Instruments Reference designs
Single Chip DDR3 Supply using the TPS51116 PMP3130 Texas Instruments Reference designs
Sync Buck, Linear Regulator (1.5V @ 9A, 0.75V @ 3A) PMP5225 Texas Instruments Reference designs