SNVSAU8 June 2017 TPS549B22

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.125-A FET
      2. 7.3.2On-Resistance
      3. 7.3.3Package Size, Efficiency and Thermal Performance
      4. 7.3.4Soft-Start Operation
      5. 7.3.5VDD Supply Undervoltage Lockout (UVLO) Protection
      6. 7.3.6EN_UVLO Pin Functionality
      7. 7.3.7Fault Protections
        1. 7.3.7.1Current Limit (ILIM) Functionality
        2. 7.3.7.2VDD Undervoltage Lockout (UVLO)
        3. 7.3.7.3Overvoltage Protection (OVP) and Undervoltage Protection (UVP)
        4. 7.3.7.4Out-of-Bounds Operation
        5. 7.3.7.5Overtemperature Protection
    4. 7.4Device Functional Modes
      1. 7.4.1DCAP3 Control Topology
      2. 7.4.2DCAP Control Topology
    5. 7.5Programming
      1. 7.5.1Programmable Pin-Strap Settings
        1. 7.5.1.1Address Selection (ADDR) Pin
        2. 7.5.1.2VSEL Pin
        3. 7.5.1.3DCAP3 Control and Mode Selection
        4. 7.5.1.4Application Workaround to Support 4-ms and 8-ms SS Settings
      2. 7.5.2Programmable Analog Configurations
        1. 7.5.2.1RSP/RSN Remote Sensing Functionality
          1. 7.5.2.1.1Output Differential Remote Sensing Amplifier
        2. 7.5.2.2Power Good (PGOOD Pin) Functionality
      3. 7.5.3PMBus Programming
        1. 7.5.3.1TPS549B22 Limitations to the PMBUS Specifications
        2. 7.5.3.2Slave Address Assignment
        3. 7.5.3.3PMBUS Address Selection
        4. 7.5.3.4Supported Formats
          1. 7.5.3.4.1Direct Format — Write
          2. 7.5.3.4.2Combined Format — Read
        5. 7.5.3.5Stop Separated Reads
        6. 7.5.3.6Supported PMBUS Commands and Registers
    6. 7.6Register Maps
      1. 7.6.1 OPERATION Register (address = 1h)
      2. 7.6.2 ON_OFF_CONFIG Register (address = 2h)
      3. 7.6.3 CLEAR FAULTS (address = 3h)
      4. 7.6.4 WRITE PROTECT (address = 10h)
      5. 7.6.5 STORE_DEFAULT_ALL (address = 11h)
      6. 7.6.6 RESTORE_DEFAULT_ALL (address = 12h)
      7. 7.6.7 CAPABILITY (address = 19h)
      8. 7.6.8 VOUT_MODE (address = 20h)
      9. 7.6.9 VOUT_COMMAND (address = 21h)
      10. 7.6.10VOUT_MARGIN_HIGH (address = 25h) ®
      11. 7.6.11VOUT_MARGIN_LOW (address = 26h)
      12. 7.6.12STATUS_BYTE (address = 78h)
      13. 7.6.13STATUS_WORD (High Byte) (address = 79h)
      14. 7.6.14STATUS_VOUT (address = 7Ah)
      15. 7.6.15STATUS_IOUT (address = 7Bh)
      16. 7.6.16STATUS_CML (address = 7Eh)
      17. 7.6.17MFR_SPECIFIC_00 (address = D0h)
      18. 7.6.18MFR_SPECIFIC_01 (address = D1h)
      19. 7.6.19MFR_SPECIFIC_02 (address = D2h)
      20. 7.6.20MFR_SPECIFIC_03 (address = D3h)
      21. 7.6.21MFR_SPECIFIC_04 (address = D4h)
      22. 7.6.22MFR_SPECIFIC_06 (address = D6h)
      23. 7.6.23MFR_SPECIFIC_07 (address = D7h)
      24. 7.6.24MFR_SPECIFIC_44 (address = FCh)
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Applications
      1. 8.2.1TPS549B22 1.5-V to 18-V Input, 1-V Output, 25-A Converter
      2. 8.2.2Design Requirements
      3. 8.2.3Detailed Design Procedure
        1. 8.2.3.1 Custom Design With WEBENCH® Tools
        2. 8.2.3.2 Switching Frequency Selection
        3. 8.2.3.3 Inductor Selection
        4. 8.2.3.4 Output Capacitor Selection
          1. 8.2.3.4.1Minimum Output Capacitance to Ensure Stability
          2. 8.2.3.4.2Response to a Load Transient
          3. 8.2.3.4.3Output Voltage Ripple
        5. 8.2.3.5 Input Capacitor Selection
        6. 8.2.3.6 Bootstrap Capacitor Selection
        7. 8.2.3.7 BP Pin
        8. 8.2.3.8 R-C Snubber and VIN Pin High-Frequency Bypass
        9. 8.2.3.9 Optimize Reference Voltage (VSEL)
        10. 8.2.3.10MODE Pin Selection
        11. 8.2.3.11ADDR Pin Selection
        12. 8.2.3.12Overcurrent Limit Design
      4. 8.2.4 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Examples
    3. 10.3Mounting and Thermal Profile Recommendation
  11. 11Device and Documentation Support
    1. 11.1Device Support
      1. 11.1.1Development Support
        1. 11.1.1.1Custom Design With WEBENCH® Tools
    2. 11.2Documentation Support
      1. 11.2.1Related Documentation
    3. 11.3Receiving Notification of Documentation Updates
    4. 11.4Community Resources
    5. 11.5Trademarks
    6. 11.6Electrostatic Discharge Caution
    7. 11.7Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Features

  • Input Voltage (PVIN): 1.5 V to 18 V
  • Input Bias Voltage (VDD) Range: 4.5 V to 22 V
  • Output Voltage Range: 0.6 V to 5.5 V
  • Integrated, 4.1-mΩ and 1.9-mΩ Power MOSFETs With 25-A Continuous Output Current
  • Voltage Reference 0.6 V to 1.2 V in 50-mV Steps Using VSEL Pin
  • ±0.5%, 0.9-VREF Tolerance Range: –40°C to +125°C Junction Temperature
  • True Differential Remote Sense Amplifier
  • D-CAP3™ Control Loop
  • Adaptive On-Time Control with 8 PMBusTM Frequencies: 315 kHz, 425 kHz, 550 kHz, 650 kHz, 825 kHz, 900 kHz, 1.025 MHz, 1.125 MHz
  • Temperature Compensated and Programmable Current Limit with RILIM and OC Clamp
  • Choice of Hiccup or Latch-Off OVP or UVP
  • VDD UVLO External Adjustment by Precision EN
  • Prebias Start-up Support
  • Eco-mode™ and FCCM Selectable
  • Full Suite of Fault Protection and PGOOD
  • Standard VOUT_COMMAND and VOUT_MARGIN (HIGH and LOW)
  • Pin-Strapping and On-the-Fly Programming
  • Fault Reporting and Warning
  • NVM Backup for Selected Commands
  • 1-MHz PMBus with PEC and SMB_ALRT#
  • Create a Custom Design Using the TPS549B22 With the WEBENCH® Power Designer

Applications

  • Enterprise Storage, SSD, NAS
  • Wireless and Wired Communication Infrastructure
  • Industrial PCs, Automation, ATE, PLC, Video Surveillance
  • Enterprise Server, Switches, Routers
  • ASIC, SoC, FPGA, DSP Core and I/O Rails

Description

The TPS549B22 device is a compact single buck converter with adaptive on-time, D-CAP3 mode control. It is designed for high accuracy, high efficiency, fast transient response, ease-of-use, low external component count and space-conscious power systems.

This device features full differential sense and TI integrated FETs with a high-side on-resistance of 4.1 mΩ and a low-side on-resistance of 1.9 mΩ. The device also features an accurate 0.5%, 0.9-V reference with an ambient temperature range between –40°C and +125°C. Competitive features include: very low external component count, accurate load regulation and line regulation, auto-skip or FCCM mode operation, and internal soft-start control.

The TPS549B22 device is available in 7 mm × 5 mm, 40-pin, LQFN-CLIP (RVF) package (RoHs exempt).

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
TPS549B22LQFN-CLIP (40)7.00 mm × 5.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Application

TPS549B22 simp_app_new_snvsau8.gif