SLVS613D October 2005  – December 2015 TPS65021

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Electrical Characteristics: Supply Pins VCC, VINDCDC1, VINDCDC2, VINDCDC3
    7. 7.7 Electrical Characteristics: Supply Pins VBACKUP, VSYSIN, VRTC, VINLDO
    8. 7.8 Electrical Characteristics: VDCDC1 Step-Down Converter
    9. 7.9 Electrical Characteristics: VDCDC2 Step-Down Converter
    10. 7.10Electrical Characteristics: VDCDC3 Step-Down Converter
    11. 7.11Timing Requirements
    12. 7.12Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1 VRTC Output and Operation With or Without Backup Battery
      2. 8.3.2 Step-Down Converters, VDCDC1, VDCDC2, and VDCDC3
      3. 8.3.3 Power Save Mode Operation
      4. 8.3.4 Low-Ripple Mode
      5. 8.3.5 Soft-Start
      6. 8.3.6 100% Duty Cycle Low-Dropout Operation
      7. 8.3.7 Active Discharge When Disabled
      8. 8.3.8 Power-Good Monitoring
      9. 8.3.9 Low-Dropout Voltage Regulators
      10. 8.3.10Undervoltage Lockout
      11. 8.3.11Power-Up Sequencing
    4. 8.4Device Functional Modes
    5. 8.5Programming
      1. 8.5.1System Reset + Control Signals
        1. 8.5.1.1DEFLDO1 and DEFLDO2
        2. 8.5.1.2Interrupt Management and the INT Pin
      2. 8.5.2Serial Interface
    6. 8.6Register Maps
      1. 8.6.1VERSION Register Address: 00h (Read Only)
      2. 8.6.2PGOODZ Register Address: 01h (Read Only)
      3. 8.6.3MASK Register Address: 02h (Read and Write), Default Value: C0h
      4. 8.6.4REG_CTRL Register Address: 03h (Read and Write), Default Value: FFh
      5. 8.6.5CON_CTRL Register Address: 04h (Read and Write), Default Value: B1h
      6. 8.6.6CON_CTRL2 Register Address: 05h (Read and Write), Default Value: 40h
      7. 8.6.7DEFCORE Register Address: 06h (Read and Write), Default Value: 14h/1Eh
      8. 8.6.8DEFSLEW Register Address: 07h (Read and Write), Default Value: 06h
      9. 8.6.9LDO_CTRL Register Address: 08h (Read and Write), Default Value: Set With DEFLDO1 and DEFLDO2
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1Input Voltage Connection
      2. 9.1.2Unused Regulators
    2. 9.2Typical Application
      1. 9.2.1Design Requirements
      2. 9.2.2Detailed Design Procedure
        1. 9.2.2.1Inductor Selection for the DC-DC Converters
        2. 9.2.2.2Output Capacitor Selection
        3. 9.2.2.3Input Capacitor Selection
        4. 9.2.2.4Output Voltage Selection
        5. 9.2.2.5VRTC Output
        6. 9.2.2.6LDO1 and LDO2
        7. 9.2.2.7TRESPWRON
        8. 9.2.2.8VCC Filter
      3. 9.2.3Application Curves
  10. 10Power Supply Recommendations
    1. 10.1Requirements for Supply Voltages below 3.0 V
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Device Support
      1. 12.1.1Third-Party Products Disclaimer
    2. 12.2Community Resources
    3. 12.3Trademarks
    4. 12.4Electrostatic Discharge Caution
    5. 12.5Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

1 Features

  • 1.2-A, 97% Efficient Step-Down Converter for System Voltage (VDCDC1)
  • 1-A, Up to 95% Efficient Step-Down Converter for Memory Voltage (VDCDC2)
  • 900-mA, 90% Efficient Step-Down Converter for Processor Core (VDCDC3)
  • 30-mA LDO and Switch for Real-Time Clock (VRTC)
  • 2 × 200-mA General-Purpose LDO
  • Dynamic Voltage Management for Processor Core
  • Preselectable LDO Voltage Using Two Digital Input Pins
  • Externally Adjustable Reset Delay Time
  • Battery Backup Functionality
  • Separate Enable Pins for Inductive Converters
  • I2C-Compatible Serial Interface
  • 85-μA Quiescent Current
  • Low-Ripple PFM Mode
  • Thermal Shutdown Protection
  • 40-Pin 6-mm × 6-mm VQFN Package

2 Applications

  • PDAs
  • Cellular and Smart Phones
  • Internet Audio Players
  • Digital Still Cameras
  • Digital Radio Players
  • Split-Supply TMS320™ DSP Family and μP Solutions: OMAP™1610, OMAP1710, OMAP330, XScale Bulverde, Samsung ARM-Based Processors, and so Forth
  • Intel® PXA270, and so Forth

3 Description

The TPS65021 device is an integrated power management IC for applications powered by one Li-Ion or Li-Polymer cell, and which requires multiple power rails. The TPS65021 device provides three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O, and memory rails in a processor-based system. All three step-down converters enter a low-power mode at light load for maximum efficiency across the widest possible range of load currents.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
TPS65021VQFN (40)6.00 mm × 6.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Application Diagram

TPS65021 Keygraphic.gif