TPS65177A

ACTIVE

Fully I2C Programmable 6-CH LCD Bias IC For All Size TV Including Gate

Product details

Display type LCD unipolar IC integration LCD bias Vin (min) (V) 8.6 Vin (max) (V) 14.7 Applications 13 to 21 inches, 21 inches and above Source driver voltage (min) (V) 13.5 Source driver voltage (max) (V) 19.8 Level shifter/scan driver (Ch) 0 V_POS (min) (V) 20 V_POS (max) (V) 40 V_NEG (min) (V) -14.5 V_NEG (max) (V) -5.5 Features GPM or GVS, HAVDD, I2C interface, Temperature sensor or compensation Topology Boost, Buck Rating Catalog Operating temperature range (°C) -40 to 150
Display type LCD unipolar IC integration LCD bias Vin (min) (V) 8.6 Vin (max) (V) 14.7 Applications 13 to 21 inches, 21 inches and above Source driver voltage (min) (V) 13.5 Source driver voltage (max) (V) 19.8 Level shifter/scan driver (Ch) 0 V_POS (min) (V) 20 V_POS (max) (V) 40 V_NEG (min) (V) -14.5 V_NEG (max) (V) -5.5 Features GPM or GVS, HAVDD, I2C interface, Temperature sensor or compensation Topology Boost, Buck Rating Catalog Operating temperature range (°C) -40 to 150
VQFN (RHA) 40 36 mm² 6 x 6
  • Enable / Disable
    • TPS65177: VI power cycle
    • TPS65177A: VI power cycle or EN-pin
  • 8.6-V to 14.7-V Input Voltage Range
  • Non-Synchronous Boost Converter (V(AVDD))
    • Integrated Isolation Switch
    • 13.5-V to 19.8-V Output Voltage (I2C)
    • 15-V Default Output Voltage
    • 4.25-A Switch Current Limit (I2C)
    • High Voltage Stress Mode (I2C)
  • Synchronous Buck Converter (V(HAVDD))
    • 4.8-V to 11.1-V Output Voltage (I2C)
    • 7.5-V Default Output Voltage
    • 1.7-A Switch Current Limit
    • High Voltage Stress Mode (I2C)
  • Non-Synchronous Buck Converter (V(IO))
    • 2.2-V to 3.7-V Output Voltage (I2C)
    • 2.5-V Default Output Voltage
    • 3-A Switch Current Limit
  • Synchronous Buck Converter (V(CORE))
    • 0.8-V to 3.3-V Output Voltage (I2C)
    • 1-V Default Output Voltage
    • 2.5-A Switch Current Limit
  • Positive Charge-Pump Controller (V(GH))
    • 20-V to 40-V Output Voltage (I2C)
    • 28-V Default Output Voltage
    • Temp. Compensation Offset 0-V to 15-V (I2C)
    • 4-V Default Offset (28 V to 32 V)
  • Negative Charge-Pump Controller (V(GL))
    • –14.5-V to –5.5-V Output Voltage (I2C)
    • –7.9-V Default Output Voltage
  • Gate Pulse Modulation (GPM)
    • Down to 0-V, 5-V, 10-V or 15-V (I2C)
    • 0-V Default Discharge Voltage
  • Temperature Compensation for V(GH)
  • Thermal Shutdown
  • I2C Compatible Interface
  • EEPROM Memory
  • 6-mm × 6-mm × 1-mm 40-Pin VQFN Package
  • Enable / Disable
    • TPS65177: VI power cycle
    • TPS65177A: VI power cycle or EN-pin
  • 8.6-V to 14.7-V Input Voltage Range
  • Non-Synchronous Boost Converter (V(AVDD))
    • Integrated Isolation Switch
    • 13.5-V to 19.8-V Output Voltage (I2C)
    • 15-V Default Output Voltage
    • 4.25-A Switch Current Limit (I2C)
    • High Voltage Stress Mode (I2C)
  • Synchronous Buck Converter (V(HAVDD))
    • 4.8-V to 11.1-V Output Voltage (I2C)
    • 7.5-V Default Output Voltage
    • 1.7-A Switch Current Limit
    • High Voltage Stress Mode (I2C)
  • Non-Synchronous Buck Converter (V(IO))
    • 2.2-V to 3.7-V Output Voltage (I2C)
    • 2.5-V Default Output Voltage
    • 3-A Switch Current Limit
  • Synchronous Buck Converter (V(CORE))
    • 0.8-V to 3.3-V Output Voltage (I2C)
    • 1-V Default Output Voltage
    • 2.5-A Switch Current Limit
  • Positive Charge-Pump Controller (V(GH))
    • 20-V to 40-V Output Voltage (I2C)
    • 28-V Default Output Voltage
    • Temp. Compensation Offset 0-V to 15-V (I2C)
    • 4-V Default Offset (28 V to 32 V)
  • Negative Charge-Pump Controller (V(GL))
    • –14.5-V to –5.5-V Output Voltage (I2C)
    • –7.9-V Default Output Voltage
  • Gate Pulse Modulation (GPM)
    • Down to 0-V, 5-V, 10-V or 15-V (I2C)
    • 0-V Default Discharge Voltage
  • Temperature Compensation for V(GH)
  • Thermal Shutdown
  • I2C Compatible Interface
  • EEPROM Memory
  • 6-mm × 6-mm × 1-mm 40-Pin VQFN Package

The TPS65177/A provides all supply rails needed by a GIP (Gate-in-Panel) or non-GIP TFT-LCD panel. All output voltages are I2C programmable.

V(IO) and V(CORE) for the T-CON, V(AVDD) and V(HAVDD) for the Source Driver and the Gamma Buffer, V(GH) and V(GL) for the Gate Driver or the Level Shifter. For use with non-GIP technology Gate Pulse Modulation (GPM) is implemented, for use with GIP technology the V(GH) rail can be temperature compensated. Furthermore a High Voltage Stress Mode (HVS) for V(AVDD) and V(HAVDD) and an integrated V(AVDD) Isolation Switch is implemented. V(CORE), V(HAVDD), V(GH), V(GL), GPM and the V(GH) temperature compensation can be enabled and disabled by I2C programming.

A single BOM (Bill of Materials) can cover several panel types and sizes whose desired output voltage levels can be programmed in production and stored in a non-volatile integrated memory.

The TPS65177/A provides all supply rails needed by a GIP (Gate-in-Panel) or non-GIP TFT-LCD panel. All output voltages are I2C programmable.

V(IO) and V(CORE) for the T-CON, V(AVDD) and V(HAVDD) for the Source Driver and the Gamma Buffer, V(GH) and V(GL) for the Gate Driver or the Level Shifter. For use with non-GIP technology Gate Pulse Modulation (GPM) is implemented, for use with GIP technology the V(GH) rail can be temperature compensated. Furthermore a High Voltage Stress Mode (HVS) for V(AVDD) and V(HAVDD) and an integrated V(AVDD) Isolation Switch is implemented. V(CORE), V(HAVDD), V(GH), V(GL), GPM and the V(GH) temperature compensation can be enabled and disabled by I2C programming.

A single BOM (Bill of Materials) can cover several panel types and sizes whose desired output voltage levels can be programmed in production and stored in a non-volatile integrated memory.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 6
Type Title Date
* Data sheet TPS65177/A Fully I2C Programmable 6-CH LCD Bias IC for all Size TV Including Gate Pulse Modulation datasheet (Rev. C) PDF | HTML 17 Feb 2016
Application note 스트컨버터의 전력계 기본 계산 (Rev. D) PDF | HTML 21 Nov 2022
Application note Basic Calculation of a Boost Converter's Power Stage (Rev. D) PDF | HTML 28 Oct 2022
Application note Understanding Undervoltage Lockout in Power Devices (Rev. A) 19 Sep 2018
Application note Basic Calculation of a Buck Converter's Power Stage (Rev. B) 17 Aug 2015
Application note Minimizing Ringing at the Switch Node of a Boost Converter 15 Sep 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
VQFN (RHA) 40 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos