SWCS046U March 2010  – October 2014 TPS65910


  1. 1Device Overview
    1. 1.1Features
    2. 1.2Applications
    3. 1.3Description
    4. 1.4Functional Block Diagram
  2. 2Revision History
  3. 3 Device Comparison
  4. 4Terminal Configuration and Functions
    1. 4.1 Signal Descriptions
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Handling Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Resistance Characteristics for RSL Package
    5. 5.5 I/O Pullup and Pulldown Characteristics
    6. 5.6 Digital I/O Voltage Electrical Characteristics
    7. 5.7 I2C Interface and Control Signals
    8. 5.8 Power Consumption
    9. 5.9 Power References and Thresholds
    10. 5.10Thermal Monitoring and Shutdown
    11. 5.1132-kHz RTC Clock
    12. 5.12Backup Battery Charger
    13. 5.13VRTC LDO
    14. 5.14VIO SMPS
    15. 5.15VDD1 SMPS
    16. 5.16VDD2 SMPS
    17. 5.17VDD3 SMPS
    18. 5.18VDIG1 and VDIG2 LDO
    19. 5.19VAUX33 and VMMC LDO
    20. 5.20VAUX1 and VAUX2 LDO
    21. 5.21VDAC and VPLL LDO
    22. 5.22Timing and Switching Characteristics
      1. 5.22.1Switch-On/-Off Sequences and Timing
        1. = 0, BOOT0 = 0
        2. = 0, BOOT0 = 1
      2. 5.22.2Power Control Timing
        1. Turn-On/Off With Rising/Falling Input Voltage
        2. State Control Through PWRON Signal
        3. SLEEP State Control
        4. Supplies State Control Through the SCLSR_EN1 and SDASR_EN2 Signals
        5. and VDD2 Voltage Control Through SCLSR_EN1 and SDASR_EN2 Signals
        6. Switching Synchronization
  6. 6Detailed Description
    1. 6.1 Power Reference
    2. 6.2 Power Sources
    3. 6.3 Embedded Power Controller
      1. 6.3.1State-Machine
      2. 6.3.2Switch-On/-Off Sequences
      3. 6.3.3Control Signals
        8. and SCLSR_EN1
      4. 6.3.4Dynamic Voltage Frequency Scaling and Adaptive Voltage Scaling Operation
    4. 6.4 32-kHz RTC Clock
    5. 6.5 RTC
      1. 6.5.1Time Calendar Registers
      2. 6.5.2General Registers
      3. 6.5.3Compensation Registers
    6. 6.6 Backup Battery Management
    7. 6.7 Backup Registers
    8. 6.8 I2C Interface
    9. 6.9 Thermal Monitoring and Shutdown
    10. 6.10Interrupts
    11. 6.11Package Description
    12. 6.12Functional Registers
      1. 6.12.1TPS65910_FUNC_REG Registers Mapping Summary
      2. 6.12.2TPS65910_FUNC_REG Register Descriptions
  7. 7Device and Documentation Support
    1. 7.1Device Support
      1. 7.1.1Development Support
      2. 7.1.2Device Nomenclature
    2. 7.2Documentation Support
    3. 7.3Related Links
    4. 7.4Community Resources
    5. 7.5Trademarks
    6. 7.6Electrostatic Discharge Caution
    7. 7.7Export Control Notice
    8. 7.8Glossary
    9. 7.9Additional Acronyms
  8. 8Mechanical Packaging and Orderable Information
    1. 8.1Packaging Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

1 Device Overview

1.1 Features

  • Embedded Power Controller
  • Two Efficient Step-Down DC-DC Converters for Processor Cores
  • One Efficient Step-Down DC-DC Converter for I/O Power
  • One Efficient Step-Up 5-V DC-DC Converter
  • SmartReflex™ Compliant Dynamic Voltage Management for Processor Cores
  • 8 LDO Voltage Regulators and One Real-Time Clock (RTC) LDO (Internal Purpose)
  • One High-Speed I2C Interface for General-Purpose Control Commands (CTL-I2C)
  • One High-Speed I2C Interface for SmartReflex Class 3 Control and Command (SR-I2C)
  • Two Enable Signals Multiplexed with SR-I2C, Configurable to Control any Supply State and Processor Cores Supply Voltage
  • Thermal Shutdown Protection and Hot-Die Detection
  • An RTC Resource With:
    • Oscillator for 32.768-kHz Crystal or 32-kHz Built-in RC Oscillator
    • Date, Time, and Calendar
    • Alarm Capability
  • One Configurable GPIO
  • DC-DC Switching Synchronization Through Internal or External 3-MHz Clock

1.2 Applications

  • Portable and Handheld Systems
  • Industrial Systems

1.3 Description

The TPS65910 device is an integrated power-management IC available in 48-QFN package and dedicated to applications powered by one Li-Ion or Li-Ion polymer battery cell or 3-series Ni-MH cells, or by a 5-V input; it requires multiple power rails. The device provides three step-down converters, one step-up converter, and eight LDOs and is designed to support the specific power requirements of OMAP-based applications.

Two of the step-down converters provide power for dual processor cores and are controllable by a dedicated class-3 SmartReflex interface for optimum power savings. The third converter provides power for the I/Os and memory in the system.

The device includes eight general-purpose LDOs providing a wide range of voltage and current capabilities. The LDOs are fully controllable by the I2C interface. The use of the LDOs is flexible; they are intended to be used as follows: Two LDOs are designated to power the PLL and video DAC supply rails on the OMAP-based processors, four general-purpose auxiliary LDOs are available to provide power to other devices in the system, and two LDOs are provided to power DDR memory supplies in applications requiring these memories.

In addition to the power resources, the device contains an embedded power controller (EPC) to manage the power sequencing requirements of the OMAP systems and an RTC.

Table 1-1 Device Information(1)

TPS65910PVQFN (48)6.00 mm × 6.00 mm
(1) For more information, see Section 8, Mechanical Packaging and Orderable Information.

1.4 Functional Block Diagram

Figure 1-1 shows the top-level diagram of the device.

SWCS046-001.gifFigure 1-1 48-QFN Top-Level Diagram