SBVS324 June 2017 TPS7A90

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Output Enable
      2. 7.3.2Dropout Voltage (VDO)
      3. 7.3.3Output Voltage Accuracy
      4. 7.3.4High Power-Supply Rejection Ratio (PSRR)
      5. 7.3.5Low Output Noise
      6. 7.3.6Output Soft-Start Control
      7. 7.3.7Power-Good Function
      8. 7.3.8Internal Protection Circuitry
        1. 7.3.8.1Undervoltage Lockout (UVLO)
        2. 7.3.8.2Internal Current Limit (ICL)
        3. 7.3.8.3Thermal Protection
    4. 7.4Device Functional Modes
      1. 7.4.1Normal Operation
      2. 7.4.2Dropout Operation
      3. 7.4.3Disabled
  8. Application and Implementation
    1. 8.1Application Information
      1. 8.1.1Adjustable Output
      2. 8.1.2Start-Up
        1. 8.1.2.1Enable (EN) and Undervoltage Lockout (UVLO)
        2. 8.1.2.2Noise-Reduction and Soft-Start Capacitor (CNR/SS)
          1. 8.1.2.2.1Noise Reduction
          2. 8.1.2.2.2Soft-Start and In-Rush Current
      3. 8.1.3Capacitor Recommendation
        1. 8.1.3.1Input and Output Capacitor Requirements (CIN and COUT)
          1. 8.1.3.1.1Load-Step Transient Response
        2. 8.1.3.2Feed-Forward Capacitor (CFF)
      4. 8.1.4Power Dissipation (PD)
      5. 8.1.5Estimating Junction Temperature
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
      1. 10.1.1Board Layout
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Device Support
      1. 11.1.1Development Support
        1. 11.1.1.1Evaluation Modules
        2. 11.1.1.2SPICE Models
      2. 11.1.2Device Nomenclature
    2. 11.2Documentation Support
      1. 11.2.1Related Documentation
    3. 11.3Receiving Notification of Documentation Updates
    4. 11.4Community Resources
    5. 11.5Trademarks
    6. 11.6Electrostatic Discharge Caution
    7. 11.7Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Features

  • 1.0% Accuracy Over Line, Load, and Temperature
  • Low Output Noise: 4.7 µVRMS (10 Hz–100 kHz)
  • Low Dropout: 100 mV (max) at 0.5 A
  • Wide Input Voltage Range: 1.4 V to 6.5 V
  • Wide Output Voltage Range: 0.8 V to 5.7 V
  • High Power-Supply Rejection Ratio (PSRR):
    • 60 dB at DC
    • 50 dB at 100 kHz
    • 30 dB at 1 MHz
  • Fast Transient Response
  • Adjustable Start-Up In-Rush Control With Selectable Soft-Start Charging Current
  • Open-Drain Power-Good (PG) Output
  • θJC = 3.2ºC/W
  • 2.5-mm × 2.5-mm, 10-Pin WSON Package

Applications

  • High-Speed Analog Circuits:
    • VCO, ADC, DAC, LVDS
  • Imaging: CMOS Sensors, Video ASICs
  • Test and Measurement
  • Instrumentation, Medical, and Audio
  • Digital Loads: SerDes, FPGA, DSP

Description

The TPS7A90 device is a low-noise (4.7 µVRMS), low-dropout (LDO) voltage regulator capable of sourcing 500 mA with only 100 mV of maximum dropout to 5 V and 200 mV to 5.7 V.

The TPS7A90 output is adjustable with external resistors from 0.8 V to 5.7 V. The TPS7A90 wide input voltage range supports operation as low as 1.4 V and up to 6.5 V.

With 1% output voltage accuracy (over line, load, and temperature) and soft-start capabilities to reduce in-rush current, the TPS7A90 is ideal for powering sensitive analog low-voltage devices [such as voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs)].

The TPS7A90 is designed to power noise-sensitive components such as those found in high-speed communication, video, medical, or test and measurement applications. The very low 4.7-µVRMS output noise and wideband PSRR (30 dB at 1 MHz) minimizes phase noise and clock jitter. These features maximize performance of clocking devices, ADCs, and DACs.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
TPS7A90WSON (10)2.50 mm × 2.50 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Typical Application Circuit

TPS7A90 app_cir_SBVS324.gif

Typical Application Diagram

TPS7A90 Typ_App_SBVS324.gif