SLVSDU9A February 2017  – March 2017

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Switching Characteristics
    7. 6.7Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Device Enable (EN)
      2. 7.3.2Adjustable Power-Good Threshold (PG, PGADJ)
      3. 7.3.3Adjustable Power-Good Delay Timer (DELAY)
      4. 7.3.4Undervoltage Shutdown
      5. 7.3.5Current Limit
      6. 7.3.6Thermal Shutdown
      7. 7.3.7Integrated Watchdog
        1. 7.3.7.1Window Watchdog (WTS, ROSC, FSEL and WRS)
        2. 7.3.7.2Standard Watchdog (WTS, ROSC and FSEL)
        3. 7.3.7.3Watchdog Service Signal and Watchdog Fault Outputs (WD and WDO)
        4. 7.3.7.4ROSC Status Detection (ROSC)
        5. 7.3.7.5Watchdog Enable (PG and WD_EN)
        6. 7.3.7.6Watchdog Initialization
        7. 7.3.7.7Window Watchdog Operation (WTS = Low)
        8. 7.3.7.8Standard Watchdog Operation (WTS = High)
    4. 7.4Device Functional Modes
      1. 7.4.1Operation With Input Voltage Lower Than 4 V
      2. 7.4.2Operation With Input Voltage Higher Than 4 V
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
        1. 8.2.2.1Input Capacitor
        2. 8.2.2.2Output Capacitor
        3. 8.2.2.3Power-Good Threshold
        4. 8.2.2.4Power-Good Delay Period
        5. 8.2.2.5Watchdog Setup
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Documentation Support
      1. 11.1.1Related Documentation
    2. 11.2Related Links
    3. 11.3Receiving Notification of Documentation Updates
    4. 11.4Community Resources
    5. 11.5Trademarks
    6. 11.6Electrostatic Discharge Caution
    7. 11.7Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

Layout

Layout Guidelines

For LDO power supplies, especially high-voltage and high-current ones, layout is an important step. If layout is not carefully designed, the regulator could not deliver enough output current because of thermal limitation. To improve the thermal performance of the device and maximize the current output at high ambient temperature, TI recommends spreading the thermal pad as much as possible and putting enough thermal vias on the thermal pad. Figure 29 shows an example layout.

Layout Example

TPS7B6333-Q1 TPS7B6350-Q1 Layout_SLVSDU9.gif Figure 29. Layout Recommendation