SLVSDU9A February 2017  – March 2017

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Switching Characteristics
    7. 6.7Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Device Enable (EN)
      2. 7.3.2Adjustable Power-Good Threshold (PG, PGADJ)
      3. 7.3.3Adjustable Power-Good Delay Timer (DELAY)
      4. 7.3.4Undervoltage Shutdown
      5. 7.3.5Current Limit
      6. 7.3.6Thermal Shutdown
      7. 7.3.7Integrated Watchdog
        1. 7.3.7.1Window Watchdog (WTS, ROSC, FSEL and WRS)
        2. 7.3.7.2Standard Watchdog (WTS, ROSC and FSEL)
        3. 7.3.7.3Watchdog Service Signal and Watchdog Fault Outputs (WD and WDO)
        4. 7.3.7.4ROSC Status Detection (ROSC)
        5. 7.3.7.5Watchdog Enable (PG and WD_EN)
        6. 7.3.7.6Watchdog Initialization
        7. 7.3.7.7Window Watchdog Operation (WTS = Low)
        8. 7.3.7.8Standard Watchdog Operation (WTS = High)
    4. 7.4Device Functional Modes
      1. 7.4.1Operation With Input Voltage Lower Than 4 V
      2. 7.4.2Operation With Input Voltage Higher Than 4 V
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
        1. 8.2.2.1Input Capacitor
        2. 8.2.2.2Output Capacitor
        3. 8.2.2.3Power-Good Threshold
        4. 8.2.2.4Power-Good Delay Period
        5. 8.2.2.5Watchdog Setup
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Documentation Support
      1. 11.1.1Related Documentation
    2. 11.2Related Links
    3. 11.3Receiving Notification of Documentation Updates
    4. 11.4Community Resources
    5. 11.5Trademarks
    6. 11.6Electrostatic Discharge Caution
    7. 11.7Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

Specifications

Absolute Maximum Ratings

Over operating ambient temperature range (unless otherwise noted)(1)(2)
MINMAXUNIT
Unregulated inputIN, EN–0.345V
Internal oscillator reference voltageROSC–0.37V
Power-good delay-timer outputDELAY–0.37V
Regulated outputOUT–0.37V
Power-good output voltagePG–0.37V
Watchdog status output voltageWDO–0.37V
Watchdog frequency selection, watchdog-type selectionFSEL, WTS–0.345V
Watchdog enableWD_EN–0.37V
Watchdog service signal voltageWD–0.37V
Window ratio selectionWRS–0.37V
Power-good threshold-adjustment voltagePGADJ–0.37V
Operating junction temperature, TJ–40150°C
Storage temperature, Tstg–65150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to ground.

ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman-body model (HBM), per AEC Q100-002(1)±2000V
Charged-device model (CDM), per AEC Q100-011All pins±500
Corner pins (1, 14, 15, and 28)±750
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

Recommended Operating Conditions

Over operating ambient temperature range (unless otherwise noted)
MINMAXUNIT
Unregulated input IN4 40 V
40-V pinsEN, FSEL, WTS0 VIN V
Regulated outputOUT05.5V
Power good, watchdog status, reference oscillatorPG, WDO, ROSC05.5V
Low voltage pinsWD, WD_EN, PGADJ, DELAY, WRS05.5V
Output current0300mA
Ambient temperature, TA–40125°C

Thermal Information

THERMAL METRIC(1) TPS7B63xx-Q1UNIT
PWP (HTSSOP)
16 PINS
RθJAJunction-to-ambient thermal resistance 39.7°C/W
RθJC(top)Junction-to-case (top) thermal resistance 28.9°C/W
RθJBJunction-to-board thermal resistance 23.8°C/W
ψJTJunction-to-top characterization parameter 1.3°C/W
ψJBJunction-to-board characterization parameter 23.7°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistance 3.1°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).

Electrical Characteristics

VIN = 14 V, COUT ≥ 4.7 µF, 1 mΩ < ESR < 20 Ω, TJ = –40°C to 150°C unless otherwise noted
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY VOLTAGE AND CURRENT (IN)
VINInput voltage440V
I(SLEEP)Input sleep currentEN = OFF4µA
I(Q)Input quiescent currentVIN = 5.6 V to 40 V for fixed 5-V VOUT; VIN = 4 V to 40 V for fixed 3.3‑V VOUT; EN = ON; watchdog disabled; IOUT < 1 mA; TJ < 80°C1929.6µA
VIN = 5.6 V to 40 V for fixed 5-V VOUT; VIN = 4 V to 40 V for fixed 3.3‑V VOUT; EN = ON; watchdog enabled; IOUT < 1 mA2842
VIN = 5.6 V to 40 V for fixed 5-V VOUT; VIN = 4 V to 40 V for fixed 3.3‑V VOUT; EN = ON; watchdog enabled; IOUT < 100 mA7898
V(UVLO)Undervoltage lockout, fallingRamp VIN down until output is turned off2.6V
V(UVLO_HYST)UVLO hysteresis0.5V
ENABLE INPUT, WATCHDOG TYPE SELECTION AND FSEL (EN, WTS, AND FSEL)
VILLow-level input voltage0.7V
VIHHigh-level input voltage2V
VhysHysteresis150mV
WATCHDOG ENABLE (WD_EN PIN)
VILLow-level input threshold voltage for watchdog enable pinWatchdog enabled0.7V
VIHHigh-level input threshold voltage for watchdog enable pinWatchdog disabled2V
IWD_ENPulldown current for watchdog enable pinVWD_EN = 5 V3µA
REGULATED OUTPUT (OUT)
VOUTRegulated outputVIN = 5.6 V to 40 V for fixed 5-V VOUT; VIN = 4 V to 40 V for fixed 3.3‑V VOUT; IOUT = 0 to 300 mA –2%2%
ΔVOUT(ΔVIN)Line regulationVIN = 5.6 V to 40 V10mV
ΔVOUT(ΔIOUT)Load regulationIOUT = 1 mA to 300 mA20mV
V(dropout)Dropout voltage (VIN – VOUT)IOUT = 300 mA(1)300400mV
IOUT = 200 mA(1)170260
IOUTOutput currentVOUT in regulation 0300mA
I(LIM)Output current limitVOUT shorted to ground, VIN = 5.6 V to 40 V3016801000mA
PSRRPower supply ripple rejection(1)IOUT = 100 mA; COUT = 10 µF; frequency (f) = 100 Hz60dB
IOUT = 100 mA; COUT = 10 µF; frequency (f) = 100 kHz40
POWER GOOD (PG, PGADJ)
VOL(PG)PG output, low voltageIOL = 5 mA, PG pulled low0.4V
Ilkg(PG)PG pin leakage currentPG pulled to VOUT through a 10‑kΩ resistor1µA
V(PG_TH)Default power-good thresholdVOUT powered above the internally set tolerance, PGADJ pin shorted to ground89.691.693.6% of VOUT
V(PG_HYST)Power-good hysteresisVOUT falling below the internally set tolerance hysteresis2% of VOUT
PGADJ
V(PGADJ_TH)Switching voltage for the power-good adjust pinVOUT is falling1.0671.11.133V
POWER-GOOD DELAY
I(DLY_CHG)DELAY capacitor charging current3510µA
V(DLY_TH)DELAY pin threshold to release PG highVoltage at DELAY pin is ramped up0.9511.05V
I(DLY_DIS)DELAY capacitor discharging currentVDELAY = 1 V0.5mA
CURRENT VOLTAGE REFERENCE (ROSC)
VROSCVoltage reference0.9511.05V
WATCHDOG (WD, WDO, WRS)
VILLow-level threshold voltage for the watchdog input and window-ratio select For WD and WRS pins30% of VOUT
VIHHigh-level threshold voltage for the watchdog input and window-ratio select For WD and WRS pins70% of VOUT
V(HYST)Hysteresis10% of VOUT
IWDPulldown current for the WD pinVWDO = 5 V24µA
VOLLow-levlel watchdog outputIWDO = 5 mA0.4V
IlkgWDO pin leakage currentWDO pin pulled to VOUT through 10‑kΩ resistor1µA
OPERATING TEMPERATURE RANGE
TJJunction temperature–40150°C
T(SD)Junction shutdown temperature175°C
T(HYST)Hysteresis of thermal shutdown25°C
Design Information – Not tested, determined by characterization.
This test is done with VOUT in regulation, measuring the VIN – VOUT when VOUT drops by 100 mV from the rated output voltage at the specified load.

Switching Characteristics

VI = 14 V, CO ≥ 4.7 µF, 1 mΩ < ESR < 20 Ω, TJ = –40°C to 150°C unless otherwise noted
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER-GOOD DELAY (DELAY)
t(DEGLITCH)Power-good deglitch time100180250µs
t(DLY_FIX)Fixed power-good delayNo capacitor connect at DELAY pin100248550µs
t(DLY)Power-on-reset delayDelay capacitor value: C(DELAY) = 100 nF 20ms
WATCHDOG (WD, WDO, WRS)
t(WD)Watchdog window durationR(ROSC) = 20 kΩ ±1%, FSEL = LOW91011ms
R(ROSC) = 20 kΩ ±1%, FSEL = HIGH455055
t(WD_TOL)Tolerance of watchdog window duration using external resistorExcludes tolerance of R(ROSC) = 20 kΩ to 100 kΩ–10%10%
tp(WD)Watchdog service-signal duration100µs
t(WD_HOLD)Watchdog output resetting time (percentage of settled watchdog window duration)20% of t(WD)
t(WD_RESET) Watchdog output resetting time R(ROSC) = 20 kΩ ± 1%, FSEL = LOW1.822.2ms
R(ROSC) = 20 kΩ ± 1%, FSEL = HIGH91011

Typical Characteristics

VIN = 14 V, VEN ≥ 2 V, TJ = –40ºC to 150ºC unless otherwise noted
TPS7B6333-Q1 TPS7B6350-Q1 D001_SLVSDU9.gif
Figure 1. Quiescent Current vs Output Current
TPS7B6333-Q1 TPS7B6350-Q1 D003_SLVSD43.gif
Figure 3. Shutdown Current vs Ambient Temperature
TPS7B6333-Q1 TPS7B6350-Q1 D005_SLVSDU9.gif
Figure 5. Dropout Voltage vs Output Current
TPS7B6333-Q1 TPS7B6350-Q1 D007_SLVSD43.gif
VOUT = 5 V
Figure 7. Output Voltage vs Ambient Temperature
TPS7B6333-Q1 TPS7B6350-Q1 D009_SLVSD43.gif
VIN = 5.6 V
Figure 9. Output Current Limit (ILIM) vs Ambient Temperature
TPS7B6333-Q1 TPS7B6350-Q1 D011_SLVSD43.gif
Figure 11. Line Regulation
TPS7B6333-Q1 TPS7B6350-Q1 D013_SLVSD43.gif
COUT = 10 μF IOUT = 100 mATA = 25°C
Figure 13. PSRR vs Frequency
TPS7B6333-Q1 TPS7B6350-Q1 D015_SLVSD43.gif
VIN = 6 V to 40 V VOUT = 5 VCOUT = 10 µF
IOUT = 1 mA
Figure 15. Line Transient
TPS7B6333-Q1 TPS7B6350-Q1 D017_SLVSD43.gif
VIN = 6 V to 40 V VOUT = 5 VCOUT = 10 µF
IOUT = 200 mA
Figure 17. Line Transient
TPS7B6333-Q1 TPS7B6350-Q1 D019_SLVSD43.gif
VOUT = 5 V COUT = 10 µFIOUT = 1 mA to 200 mA
Figure 19. Load Transient
TPS7B6333-Q1 TPS7B6350-Q1 D002_SLVSD43.gif
Figure 2. Quiescent Current vs Input Voltage
TPS7B6333-Q1 TPS7B6350-Q1 D004_SLVSD43.gif
Figure 4. Quiescent Current vs Ambient Temperature
TPS7B6333-Q1 TPS7B6350-Q1 D006_SLVSD43.gif
IOUT = 200 mA
Figure 6. Dropout Voltage vs Ambient Temperature
TPS7B6333-Q1 TPS7B6350-Q1 D008_SLVSD43.gif
VOUT = 5 V
Figure 8. Output Voltage vs Input Voltage
TPS7B6333-Q1 TPS7B6350-Q1 D010_SLVSDU9.gif
Figure 10. Load Regulation
TPS7B6333-Q1 TPS7B6350-Q1 D012_SLVSD43.gif
COUT = 10 μF IOUT = 1 mATA = 25°C
Figure 12. PSRR vs Frequency
TPS7B6333-Q1 TPS7B6350-Q1 D014A_SLVSD43.gif
Figure 14. ESR Stability vs Output Capacitance
TPS7B6333-Q1 TPS7B6350-Q1 D016_SLVSD43.gif
VIN = 40 V to 6 V VOUT = 5 VCOUT = 10 µF
IOUT = 1 mA
Figure 16. Line Transient
TPS7B6333-Q1 TPS7B6350-Q1 D018_SLVSD43.gif
VIN = 40 V to 6 V VOUT = 5 VCOUT = 10 µF
IOUT = 200 mA
Figure 18. Line Transient
TPS7B6333-Q1 TPS7B6350-Q1 D020_SLVSD43.gif
VOUT = 5 V COUT = 10 µFIOUT = 200 mA to 1 mA
Figure 20. Load Transient