SLOS743L August 2011  – March 2017 TRF7970A


  1. 1Device Overview
    1. 1.1Features
    2. 1.2Applications
    3. 1.3Description
    4. 1.4Functional Block Diagram
  2. 2Revision History
  3. 3Device Characteristics
    1. 3.1Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1Pin Diagram
    2. 4.2Signal Descriptions
  5. 5Specifications
    1. 5.1Absolute Maximum Ratings
    2. 5.2ESD Ratings
    3. 5.3Recommended Operating Conditions
    4. 5.4Electrical Characteristics
    5. 5.5Thermal Resistance Characteristics
    6. 5.6Switching Characteristics
  6. 6Detailed Description
    1. 6.1 Overview
      1. 6.1.1RFID and NFC Operation - Reader and Writer
      2. 6.1.2NFC Device Operation - Initiator
      3. 6.1.3NFC Device Operation - Target
        1. Target
        2. Target
        3. Emulation
    2. 6.2 System Block Diagram
    3. 6.3 Power Supplies
      1. 6.3.1Supply Arrangements
      2. 6.3.2Supply Regulator Settings
      3. 6.3.3Power Modes
    4. 6.4 Receiver - Analog Section
      1. 6.4.1Main and Auxiliary Receivers
      2. 6.4.2Receiver Gain and Filter Stages
    5. 6.5 Receiver - Digital Section
      1. 6.5.1Received Signal Strength Indicator (RSSI)
        1. RSSI - Main and Auxiliary Receivers
        2. RSSI
    6. 6.6 Oscillator Section
    7. 6.7 Transmitter - Analog Section
    8. 6.8 Transmitter - Digital Section
    9. 6.9 Transmitter - External Power Amplifier and Subcarrier Detector
    10. 6.10TRF7970A IC Communication Interface
      1. 6.10.1General Introduction
        1. Address Mode
        2. Address Mode (Single Address Mode)
        3. Command Mode
        4. Operation
      2. 6.10.2Parallel Interface Mode
      3. 6.10.3Reception of Air Interface Data
      4. 6.10.4Data Transmission From MCU to TRF7970A
      5. 6.10.5Serial Interface Communication (SPI)
        1. Interface Mode With Slave Select (SS)
      6. 6.10.6Direct Mode
    11. 6.11TRF7970A Initialization
    12. 6.12Special Direct Mode for Improved MIFARE Compatibility
    13. 6.13NFC Modes
      1. 6.13.1Target
      2. 6.13.2Initiator
    14. 6.14Direct Commands from MCU to Reader
      1. 6.14.1Command Codes
        1. Idle (0x00)
        2. Software Initialization (0x03)
        3. Initial RF Collision Avoidance (0x04)
        4. Response RF Collision Avoidance (0x05)
        5. Response RF Collision Avoidance (0x06, n = 0)
        6. Reset FIFO (0x0F)
        7. Transmission With CRC (0x11)
        8. Transmission Without CRC (0x10)
        9. Delayed Transmission With CRC (0x13)
        10. Transmission Without CRC (0x12)
        11. Next Time Slot (0x14)
        12. Receiver (0x16)
        13. Receiver (0x17)
        14. Internal RF (RSSI at RX Input With TX ON) (0x18)
        15. External RF (RSSI at RX Input with TX OFF) (0x19)
    15. 6.15Register Description
      1. 6.15.1Register Preset
      2. 6.15.2Register Overview
      3. 6.15.3Detailed Register Description
        1. Configuration Registers
          1. Status Control Register (0x00)
          2. Control Register (0x01)
        2. Registers - Sublevel Configuration Registers
          1. ISO/IEC 14443 TX Options Register (0x02)
          2. ISO/IEC 14443 High-Bit-Rate and Parity Options Register (0x03)
          3. TX Timer High Byte Control Register (0x04)
          4. TX Timer Low Byte Control Register (0x05)
          5. TX Pulse Length Control Register (0x06)
          6. RX No Response Wait Time Register (0x07)
          7. RX Wait Time Register (0x08)
          8. Modulator and SYS_CLK Control Register (0x09)
          9. RX Special Setting Register (0x0A)
          10. and I/O Control Register (0x0B)
        3. Registers
          1. IRQ Status Register (0x0C)
          2. Interrupt Mask Register (0x0D) and Collision Position Register (0x0E)
          3. RSSI Levels and Oscillator Status Register (0x0F)
          4. Special Functions Register (0x10)
          5. Special Functions Register (0x11)
          6. Adjustable FIFO IRQ Levels Register (0x14)
          7. NFC Low Field Level Register (0x16)
          8. NFCID1 Number Register (0x17)
          9. NFC Target Detection Level Register (0x18)
          10. Target Protocol Register (0x19)
        4. Registers
          1. Register (0x1A)
          2. Register (0x1B)
        5. Control Registers
          1. Status Register (0x1C)
          2. Length Byte1 Register (0x1D), TX Length Byte2 Register (0x1E)
  7. 7Applications, Implementation, and Layout
    1. 7.1TRF7970A Reader System Using SPI With SS Mode
      1. 7.1.1General Application Considerations
      2. 7.1.2Schematic
    2. 7.2Layout Considerations
    3. 7.3Impedance Matching TX_Out (Pin 5) to 50 Ω
    4. 7.4Reader Antenna Design Guidelines
  8. 8Device and Documentation Support
    1. 8.1Getting Started and Next Steps
    2. 8.2Device Nomenclature
    3. 8.3Tools and Software
    4. 8.4Documentation Support
    5. 8.5Community Resources
    6. 8.6Trademarks
    7. 8.7Electrostatic Discharge Caution
    8. 8.8Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Device Overview


  • Supports Near Field Communication (NFC) Standards NFCIP-1 (ISO/IEC 18092) and NFCIP‑2 (ISO/IEC 21481)
  • Completely Integrated Protocol Handling for ISO/IEC 15693, ISO/IEC 18000-3, ISO/IEC 14443 A and B, and FeliCa™
  • Integrated Encoders, Decoders, and Data Framing for NFC Initiator, Active and Passive Target Operation for All Three Bit Rates (106 kbps, 212 kbps, 424 kbps), and Card Emulation
  • RF Field Detector With Programmable Wake-up Levels for NFC Passive Transponder Emulation Operation
  • RF Field Detector for NFC Physical Collision Avoidance
  • Integrated State Machine for ISO/IEC 14443 A Anticollision (Broken Bytes) Operation (Transponder Emulation or NFC Passive Target)
  • Input Voltage Range: 2.7 VDC to 5.5 VDC
  • Programmable Output Power: +20 dBm (100 mW), +23 dBm (200 mW)
  • Programmable I/O Voltage Levels From 1.8 VDC to 5.5 VDC
  • Programmable System Clock Frequency Output (RF, RF/2, RF/4) from 13.56-MHz or 27.12-MHz Crystal or Oscillator
  • Integrated Voltage Regulator Output for Other System Components (MCU, Peripherals, Indicators), 20 mA (Max)
  • Programmable Modulation Depth
  • Dual Receiver Architecture With RSSI for Elimination of "Read Holes" and Adjacent Reader System or Ambient In-Band Noise Detection
  • Programmable Power Modes for Ultra Low-Power System Design (Power Down <1 µA)
  • Parallel or SPI Interface (With 127-Byte FIFO)
  • Temperature Range: –40°C to 110°C
  • 32-Pin QFN Package (5 mm × 5 mm)


  • Mobile Devices (Tablets, Handsets)
  • Secure Pairing (Bluetooth®, Wi-Fi®, Other Paired Wireless Networks)
  • Public Transport or Event Ticketing
  • Passport or Payment (POS) Reader Systems
  • Short-Range Wireless Communication Tasks (Firmware Updates)
  • Product Identification or Authentication
  • Medical Equipment or Consumables
  • Access Control, Digital Door Locks
  • Sharing of Electronic Business Cards


The TRF7970A device is an integrated analog front end (AFE) and multiprotocol data-framing device for a 13.56-MHz NFC/RFID system supporting all three NFC operation modes – reader/writer, peer-to-peer, and card emulation according to ISO/IEC 14443 A and B, Sony FeliCa, ISO/IEC 15693, NFCIP-1 (ISO/IEC 18092), and NFCIP-2 (ISO/IEC 21481). Built-in programming options make the device suitable for a wide range of applications for NFC, proximity, and vicinity identification systems.

The device is configured by selecting the desired protocol in the control registers. Direct access to all control registers allows fine tuning of various reader parameters as needed.

The TRF7970A device supports data rates up to 848 kbps with all framing and synchronization tasks for the ISO protocols onboard. The TRF7970A device also supports reader and writer mode for NFC Forum tag types 1, 2, 3, 4, and 5. Other standards and even custom protocols can be implemented by using one of the direct modes the device offers. These direct modes let the user fully control the AFE and also gain access to the raw subcarrier data or the unframed, but already ISO-formatted, data and the associated (extracted) clock signal.

The receiver system has a dual-input receiver architecture to maximize communication robustness. The receivers also include various automatic and manual gain control options. The received signal strength from transponders, ambient sources, or internal levels is available in the RSSI register.

A SPI or parallel interface can be used for the communication between the MCU and the TRF7970A device. When the built-in hardware encoders and decoders are used, transmit and receive functions use a 127-byte FIFO register. For direct transmit or receive functions, the encoders or decoders can be bypassed so the MCU can process the data in real time.

The TRF7970A device supports a wide supply voltage range of 2.7 V to 5.5 V and data communication levels from 1.8 V to 5.5 V for the MCU I/O interface.

The transmitter has selectable output power levels of 100 mW (+20 dBm) or 200 mW (+23 dBm) equivalent into a 50-Ω load when using a 5-V supply and supports OOK and ASK modulation with selectable modulation depth.

The built-in programmable auxiliary voltage regulator delivers up to 20 mA to supply an MCU and additional external circuits within the reader system.

Integrated RF field detector with programmable wake-up levels, eight selectable power modes, and ultra-low power operation enable easy development of robust and cost-efficient designs for long battery life.

Start evaluating the TRF7970A multiprotocol transceiver IC with the TRF7970AEVM, TRF7970ATB, or DLP-7970ABP.

Device Information

TRF7970ARHBVQFN (32)5 mm × 5 mm

Functional Block Diagram

Figure 1-1 shows the block diagram.

TRF7970A system_block_dgm_slos743.gif Figure 1-1 Block Diagram