SLLSE32G November   2010  – November 2017 TUSB1310A

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Pin Configuration and Functions
    1. 3.1 Pin Attributes
    2. 3.2 Configuration Pins
    3. 3.3 Signal Descriptions
      1. 3.3.1 PIPE
      2. 3.3.2 ULPI
      3. 3.3.3 Clocking
      4. 3.3.4 JTAG Interface
      5. 3.3.5 Reset and Output Control Interface
      6. 3.3.6 Strap Options
      7. 3.3.7 USB Interfaces
      8. 3.3.8 Special Connect
      9. 3.3.9 Power and Ground
  4. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Device Power-Consumption Summary
    5. 4.5 DC Characteristics for 1.8-V Digital I/O
    6. 4.6 Thermal Characteristics
    7. 4.7 Timing Characteristics
      1. 4.7.1 Power-Up and Reset Timing
      2. 4.7.2 PIPE Transmit
      3. 4.7.3 PIPE Receive
      4. 4.7.4 ULPI Parameters
      5. 4.7.5 ULPI Clock
      6. 4.7.6 ULPI Transmit
      7. 4.7.7 ULPI Receive Timing
    8. 4.8 Typical Characteristics
  5. 5Detailed Description
    1. 5.1 Overview
    2. 5.2 Functional Block Diagram
    3. 5.3 Feature Description
      1. 5.3.1 Power On and Reset
        1. 5.3.1.1 RESETN and PHY_RESETN: Hardware Reset
        2. 5.3.1.2 ULPI Reset: Software Reset
        3. 5.3.1.3 OUT_ENABLE: Output Enable
        4. 5.3.1.4 Power-Up Sequence
      2. 5.3.2 Clocks
        1. 5.3.2.1 Clock Distribution
        2. 5.3.2.2 Output Clock
      3. 5.3.3 Power State Transition Time
      4. 5.3.4 Power Management
        1. 5.3.4.1 USB Power Management
      5. 5.3.5 Receiver Status
        1. 5.3.5.1 Clock Tolerance Compensation
        2. 5.3.5.2 Receiver Detection
        3. 5.3.5.3 8b/10b Decode Errors
        4. 5.3.5.4 Elastic Buffer Errors
        5. 5.3.5.5 Disparity Errors
      6. 5.3.6 Loopback
      7. 5.3.7 Adaptive Equalizer
    4. 5.4 Device Functional Modes
      1. 5.4.1 USB 3.0 Mode
      2. 5.4.2 USB 2.0 Mode
      3. 5.4.3 ULPI Modes
    5. 5.5 Register Maps
      1. 5.5.1  Vendor ID and Product ID (00h-03h)
      2. 5.5.2  Function Control (04h-06h)
      3. 5.5.3  Interface Control (07h-09h)
      4. 5.5.4  OTG Control
      5. 5.5.5  USB Interrupt Enable Rising (0Dh-0Fh)
      6. 5.5.6  USB Interrupt Enable Falling (10h-12h)
      7. 5.5.7  USB Interrupt Status (13h)
      8. 5.5.8  USB Interrupt Latch (14h)
      9. 5.5.9  Debug (15h)
      10. 5.5.10 Scratch Register (16-18h)
  6. 6Application, Implementation, and Layout
    1. 6.1 Application Information
    2. 6.2 Typical Application
      1. 6.2.1 Design Requirements
        1. 6.2.1.1 Clock Source Requirements
          1. 6.2.1.1.1 Clock Source Selection Guide
          2. 6.2.1.1.2 Oscillator
          3. 6.2.1.1.3 Crystal
      2. 6.2.2 Detailed Design Procedure
        1. 6.2.2.1 Chip Connection on PCB
          1. 6.2.2.1.1 USB Connector Pins Connection
          2. 6.2.2.1.2 Clock Connections
      3. 6.2.3 Application Curve
      4. 6.2.4 Layout
        1. 6.2.4.1 Layout Guidelines
          1. 6.2.4.1.1 High-Speed Differential Routing
          2. 6.2.4.1.2 SuperSpeed Differential Routing
        2. 6.2.4.2 Layout Example
    3. 6.3 Power Supply Recommendations
      1. 6.3.1 1.1-V and 1.8-V Digital Supply
      2. 6.3.2 1.1-V, 1.8-V and 3.3-V Analog Supplies
      3. 6.3.3 Capacitor Selection Recommendations
  7. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
      2. 7.1.2 Community Resources
    2. 7.2 Trademarks
    3. 7.3 Electrostatic Discharge Caution
    4. 7.4 Glossary
  8. 8Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Device and Documentation Support

7.1 Documentation Support

7.1.1 Related Documentation

The following documents describe the TUSB1310A transceiver. Copies of these documents are available on the Internet at www.ti.com.

    (SPRAAR7) High-Speed Interface Layout Guidelines
    (SLLU123) TUSB1310 Implementation Guide

7.1.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community The TI engineer-to-engineer (E2E) community was created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

7.2 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

7.3 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

7.4 Glossary

    TI Glossary This glossary lists and explains terms, acronyms, and definitions.