SLLS413L February   2000  – June 2017 TUSB2046B , TUSB2046I

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      USB-Tiered Configuration Example
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Differential Driver Switching Characteristics (Full Speed Mode)
    7. 7.7 Differential Driver Switching Characteristics (Low Speed Mode)
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB Power Management
      2. 8.3.2 Clock Generation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Vendor ID and Product ID With External Serial EEPROM
    5. 8.5 Programming
      1. Table 1. EEPROM Memory Map
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 TUSB2046x Power Supply
    2. 10.2 Downstream Port Power
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Placement
      2. 11.1.2 Differential Pairs
      3. 11.1.3 Ground
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Fully Compliant With the USB Specification as a Full-Speed Hub: TID #30220231
  • 32-Pin LQFP (1) Package With a 0.8-mm Terminal Pitch or QFN Package With a 0.5-mm Pin Pitch
  • 3.3-V Low-Power ASIC Logic
  • Integrated USB Transceivers
  • State Machine Implementation Requires No Firmware Programming
  • One Upstream Port and Four Downstream Ports
  • All Downstream Ports Support Full-Speed and Low-Speed Operations
  • Two Power Source Modes
    • Self-Powered Mode
    • Bus-Powered Mode
  • Power Switching and Overcurrent Reporting Is Provided Ganged or Per Port
  • Supports Suspend and Resume Operations
  • Supports Programmable Vendor ID and Product ID With External Serial EEPROM
  • 3-State EEPROM Interface Allows EEPROM Sharing
  • Push-Pull Outputs for PWRON Eliminate the Need for External Pullup Resistors
  • Noise Filtering on OVRCUR Provides Immunity to Voltage Spikes
  • Package Pinout Allows 2-Layer PCB
  • Low EMI Emission Achieved by a 6-MHz Crystal Input
  • Migrated From Proven TUSB2040 Hub
  • Lower Cost Than the TUSB2040 Hub
  • Enhanced System ESD Performance
  • No Special Driver Requirements; Works Seamlessly With Any Operating System With USB Stack Support
  • Supports 6-MHz Operation Through a Crystal Input or a 48-MHz Input Clock
  • JEDEC descriptor S-PQFP-G for low-profile quad flatpack (LQFP).