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UC2524AM

ACTIVE

Advanced Regulating Pulse Width Modulators

Product details

Topology Boost, Flyback, Forward, Full bridge, Half bridge, Push pull Control mode Voltage Duty cycle (max) (%) 50 Switching frequency (max) (kHz) 450 Features Adjustable switching frequency, Error amplifier, Multi-topology, Soft start, Synchronization pin UVLO thresholds on/off (V) 7.5/7 Operating temperature range (°C) -40 to 85 Rating Military Gate drive (typ) (A) 0.2 Vin (max) (V) 40
Topology Boost, Flyback, Forward, Full bridge, Half bridge, Push pull Control mode Voltage Duty cycle (max) (%) 50 Switching frequency (max) (kHz) 450 Features Adjustable switching frequency, Error amplifier, Multi-topology, Soft start, Synchronization pin UVLO thresholds on/off (V) 7.5/7 Operating temperature range (°C) -40 to 85 Rating Military Gate drive (typ) (A) 0.2 Vin (max) (V) 40
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
  • Fully Interchangeable with Standard UC1524 Family
  • Precision Reference Internally Trimmed to ±1%
  • High-Performance Current Limit Function
  • Under-Voltage Lockout with Hysteretic Turn-on
  • Start-Up Supply Current Less Than 4mA
  • Output Current to 200mA
  • 60V Output Capability
  • Wide Common-Mode Input Range for both Error and Current Limit Amplifiers
  • PWM Latch Insures Single Pulse per Period
  • Double Pulse Suppression Logic
  • 200ns Shutdown through PWM Latch
  • Guaranteed Frequency Accuracy
  • Thermal Shutdown Protection
  • Fully Interchangeable with Standard UC1524 Family
  • Precision Reference Internally Trimmed to ±1%
  • High-Performance Current Limit Function
  • Under-Voltage Lockout with Hysteretic Turn-on
  • Start-Up Supply Current Less Than 4mA
  • Output Current to 200mA
  • 60V Output Capability
  • Wide Common-Mode Input Range for both Error and Current Limit Amplifiers
  • PWM Latch Insures Single Pulse per Period
  • Double Pulse Suppression Logic
  • 200ns Shutdown through PWM Latch
  • Guaranteed Frequency Accuracy
  • Thermal Shutdown Protection

The UC1524A family of regulating PWM ICs has been designed to retain the same highly versatile architecture of the industry standard UC1524 (SG1524) while offering substantial improvements to many of its limitations. The UC1524A is pin compatible with "non-A" models and in most existing applications can be directly interchanged with no effect on power supply performance. Using the UC1524A, however, frees the designer from many concerns which typically had required additional circuitry to solve.

The UC1524A includes a precise 5V reference trimmed to ±1% accuracy, eliminating the need for potentiometer adjustments; an error amplifier with an input range which includes 5V, eliminating the need for a reference divider; a current sense amplifier useful in either the ground or power supply output lines; and a pair of 60V, 200mA uncommitted transistor switches which greatly enhance output versatility.

An additional feature of the UC1524A is an under-voltage lockout circuit which disables all the internal circuitry, except the reference, until the input voltage has risen to 8V. This holds standby current low until turn-on, greatly simplifying the design of low power, off-line supplies. The turn-on circuit has approximately 600mV of hysteresis for jitter-free activation.

Other product enhancements included in the UC1524A’s design include a PWM latch which insures freedom from multiple pulsing within a period, even in noisy environments, logic to eliminate double pulsing on a single output, a 200ns external shutdown capability, and automatic thermal protection from excessive chip temperature. The oscillator circuit of the UC1524A is usable beyond 500kHz and is now easier to synchronize with an external clock pulse.

The UC1524A is packaged in a hermetic 16-pin DIP and is rated for operation from -55°C to +125°C. The UC2524A and 3524A are available in either ceramic or plastic packages and are rated for operation from -25°C to +85°C and 0°C to 70°C, respectively. Surface mount devices are also available.

The UC1524A family of regulating PWM ICs has been designed to retain the same highly versatile architecture of the industry standard UC1524 (SG1524) while offering substantial improvements to many of its limitations. The UC1524A is pin compatible with "non-A" models and in most existing applications can be directly interchanged with no effect on power supply performance. Using the UC1524A, however, frees the designer from many concerns which typically had required additional circuitry to solve.

The UC1524A includes a precise 5V reference trimmed to ±1% accuracy, eliminating the need for potentiometer adjustments; an error amplifier with an input range which includes 5V, eliminating the need for a reference divider; a current sense amplifier useful in either the ground or power supply output lines; and a pair of 60V, 200mA uncommitted transistor switches which greatly enhance output versatility.

An additional feature of the UC1524A is an under-voltage lockout circuit which disables all the internal circuitry, except the reference, until the input voltage has risen to 8V. This holds standby current low until turn-on, greatly simplifying the design of low power, off-line supplies. The turn-on circuit has approximately 600mV of hysteresis for jitter-free activation.

Other product enhancements included in the UC1524A’s design include a PWM latch which insures freedom from multiple pulsing within a period, even in noisy environments, logic to eliminate double pulsing on a single output, a 200ns external shutdown capability, and automatic thermal protection from excessive chip temperature. The oscillator circuit of the UC1524A is usable beyond 500kHz and is now easier to synchronize with an external clock pulse.

The UC1524A is packaged in a hermetic 16-pin DIP and is rated for operation from -55°C to +125°C. The UC2524A and 3524A are available in either ceramic or plastic packages and are rated for operation from -25°C to +85°C and 0°C to 70°C, respectively. Surface mount devices are also available.

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* Data sheet Advanced Regulating Pulse Width Modulators datasheet (Rev. B) 13 Apr 2007

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CDIP (J) 16 View options

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