SLRS064B June   2014  – August 2016 ULN2003B

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, TA = 25°C
    6. 6.6 Electrical Characteristics, TA = -40°C to +105°C
    7. 6.7 Switching Characteristics, TA = 25°C
    8. 6.8 Switching Characteristics, TA = -40°C to +105°C
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Inductive Load Drive
      2. 8.4.2 Resistive Load Drive
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Drive Current
        2. 9.2.2.2 Output Low Voltage
        3. 9.2.2.3 Power Dissipation and Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

at 25°C free-air temperature (unless otherwise noted)(1)
MIN MAX UNIT
VCC Collector-emitter voltage 50 V
Clamp diode reverse voltage(2) 50 V
VI Input voltage(2) 30 V
Peak collector current(3)(4) 500 mA
IOK Output clamp current 500 mA
Total emitter-terminal current –2.5 A
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.
(3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) 500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply Voltage 0 50 V
TA Operating free-air temperature –40 105 °C
TJ Junction Temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) ULN2003B UNIT
PW (TSSOP) D (SOIC) N (PDIP)
16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 105.5 81.2 49.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 38.3 40 36.2 °C/W
RθJB Junction-to-board thermal resistance 50.9 38.6 29.2 °C/W
ψJT Junction-to-top characterization parameter 4.1 10.5 20.2 °C/W
ψJB Junction-to-board characterization parameter 50.3 38.3 29.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics, TA = 25°C

PARAMETER TEST FIGURE TEST CONDITIONS MIN TYP MAX UNIT
VI(on) On-state input voltage Figure 19 VCE = 2 V IC = 200 mA 2.4 V
IC = 250 mA 2.7
IC = 300 mA 3
VCE(sat) Collector-emitter saturation voltage Figure 18 II = 250 μA, IC = 100 mA 0.9 1.1 V
II = 350 μA, IC = 200 mA 1 1.3
II = 500 μA, IC = 350 mA 1.2 1.6
ICEX Collector cutoff current Figure 15 VCE = 50 V, II = 0 10 μA
VF Clamp forward voltage Figure 21 IF = 350 mA 1.7 2 V
II(off) Off-state input current Figure 16 VCE = 50 V, IC = 500 μA 50 65 μA
II Input current Figure 17 VI = 3.85 V 0.93 1.35 mA
IR Clamp reverse current Figure 20 VR = 50 V 50 μA
Ci Input capacitance VI = 0, f = 1 MHz 15 25 pF

6.6 Electrical Characteristics, TA = –40°C to +105°C

PARAMETER TEST FIGURE TEST CONDITIONS MIN TYP MAX UNIT
VI(on) On-state input voltage Figure 19 VCE = 2 V IC = 200 mA 2.7 V
IC = 250 mA 2.9
IC = 300 mA 3
VCE(sat) Collector-emitter saturation voltage Figure 18 II = 250 μA, IC = 100 mA 0.9 1.2 V
II = 350 μA, IC = 200 mA 1 1.4
II = 500 μA, IC = 350 mA 1.2 1.7
ICEX Collector cutoff current Figure 15 VCE = 50 V, II = 0 20 μA
VF Clamp forward voltage Figure 21 IF = 350 mA 1.7 2.2 V
II(off) Off-state input current Figure 16 VCE = 50 V, IC = 500 μA 30 65 μA
II Input current Figure 17 VI = 3.85 V 0.93 1.35 mA
IR Clamp reverse current Figure 20 VR = 50 V 100 μA
Ci Input capacitance VI = 0, f = 1 MHz 15 25 pF

6.7 Switching Characteristics, TA = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output 0.25 1 μs
tPHL Propagation delay time, high- to low-level output 0.25 1 μs
VOH High-level output voltage after switching VS = 50 V, IO  ≈ 300 mA VS  – 20 mV

6.8 Switching Characteristics, TA = –40°C to +105°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output 1 10 μs
tPHL Propagation delay time, high- to low-level output 1 10 μs
VOH High-level output voltage after switching VS = 50 V, IO  ≈ 300 mA VS  – 50 mV

6.9 Typical Characteristics

ULN2003B D001_ULN2003B.gif
Figure 1. Collector-Emitter Saturation Voltage vs Collector Current (One Darlington)
ULN2003B D008_ULN2003B.gif
Figure 3. Input Current vs Input Voltage
ULN2003B beta_curve.gif
Figure 5. hFE vs IOUT
ULN2003B t25C_PW.gif
TA = 25ºC
Figure 7. PW Package Maximum Collector Current
vs Duty Cycle
ULN2003B t70C_D.gif
TA = 70ºC
Figure 9. D Package Maximum Collector Current
vs Duty Cycle
ULN2003B t70C_N.gif
TA = 70ºC
Figure 11. N Package Maximum Collector Current
vs Duty Cycle
ULN2003B t105C_PW.gif
TA = 105ºC
Figure 13. PW Package Maximum Collector Current
vs Duty Cycle
ULN2003B D002_ULN2003B.gif
Figure 2. Collector-Emitter Saturation Voltage vs Total Collector Current (Two Darlingtons in Parallel)
ULN2003B D004_ULN2003B.gif
Figure 4. Collector-Emitter Saturation Voltage vs Collector Current
ULN2003B t25C_D.gif
TA = 25ºC
Figure 6. D Package Maximum Collector Current
vs Duty Cycle
ULN2003B t25C_N.gif
TA = 25ºC
Figure 8. N Package Maximum Collector Current
vs Duty Cycle
ULN2003B t70C_PW.gif
TA = 70ºC
Figure 10. PW Package Maximum Collector Current
vs Duty Cycle
ULN2003B t105C_D.gif
TA = 105ºC
Figure 12. D Package Maximum Collector Current
vs Duty Cycle
ULN2003B t105C_N.gif
TA = 105ºC
Figure 14. N Package Maximum Collector Current vs Duty Cycle