12-Bit, 4.0 GSPS RF sampling ADC with JESD204B interface - ADC12J4000


12-Bit, 4.0 GSPS RF sampling ADC with JESD204B interface


The ADC12J4000 device is a wideband sampling and digital tuning device. The core technology contained in the device is Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology that enables a large block of frequency spectrum to be sampled directly at RF. This technology is combined with low-power digital-processing blocks that provide digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface that is compatible with downstream system-processing elements. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 8 lanes of the serial interface.

A DDC bypass mode allows the full rate 12-bit raw ADC data to also be output. This mode of operation requires 8 lanes of serial output.

Clear advantages of the ADC12J4000 device over existing solutions currently available on the market are scalability, cost per radio path, power consumption per radio path, and flexibility.

The ADC12J4000 device is available in a 68 terminal QFN package. The device operates over the Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range.


  • Excellent Noise and Linearity up to
    and beyond FIN = 2.7 GHz
  • Configurable DDC
  • Decimation Factors from 4 to 32
    (Complex Baseband Out)
  • Raw Output Bandwidth of 1000 MHz at
    4x Decimation and 4000 MSPS
  • Raw Output Bandwidth of 125 MHz at
    32x Decimation and 4000 MSPS
  • Bypass Mode for Full Bandwidth Data
  • Low Pin-Count-Configurable JESD204B Output
  • Automatically Optimized Output Lane Count
  • Embedded Low Latency Signal Range Indication
  • Low Power Consumption
  • Key Specifications
    • Max Sampling Rate: 4000 MSPS
    • Min Sampling Rate: 1000 MSPS
    • DDC Output Word Size: 15-Bit Complex
      (30 bits total)
    • Bypass Output Word Size: 12-Bit Offset Binary
    • Noise Floor: −149 dBFS/Hz or −150 dbm/Hz
    • IMD3: −64 dBc (FIN = 2670 MHz
      ± 2.5 MHz at −10 dBFS)
    • FPBW (–3 dB): 3.3 GHz
    • NPR: 48.5 dB
    • Supply Voltages: 1.9 and 1.2 V
    • Power Consumption
      • Bypass (4000 MSPS): 2.0 W
      • Decimate by 10 (4000 MSPS): 2 W
      • Power Down Mode: 10 mW

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Parametrics Compare all products in High Speed ADC (>=1GSPS)

Resolution (Bits)
SNR (dB)
Analog Input BW (MHz)
# Input Channels
Sample Rate (max) (SPS)
Operating Temperature Range (C)
Reference Mode
ADC12J4000 ADC12J1600 ADC12J2700
12     12     12    
55     55     55    
Folding Interpolating     Folding Interpolating     Folding Interpolating    
JESD204B     JESD204B     JESD204B    
3300     3300     3300    
68VQFN     68VQFN     68VQFN    
71     70     71    
1     1     1    
4GSPS     1.6GSPS     2.7GSPS    
-40 to 85     -40 to 85     -40 to 85    
Catalog     Catalog     Catalog    
Int     Int     Int    

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