Product details

Sample rate (max) (Msps) 3000 Resolution (Bits) 14 Number of input channels 1 Interface type JESD204B Analog input BW (MHz) 3200 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 1.35 Power consumption (typ) (mW) 3200 Architecture Pipeline SNR (dB) 61.4 ENOB (bit) 9.8 SFDR (dB) 71 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 3000 Resolution (Bits) 14 Number of input channels 1 Interface type JESD204B Analog input BW (MHz) 3200 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 1.35 Power consumption (typ) (mW) 3200 Architecture Pipeline SNR (dB) 61.4 ENOB (bit) 9.8 SFDR (dB) 71 Operating temperature range (°C) -40 to 85 Input buffer Yes
VQFNP (RMP) 72 100 mm² 10 x 10
  • 14-Bit, 3-GSPS ADC
  • Noise Floor: –155 dBFS/Hz
  • RF Input Supports Up To 4.0 GHz
  • Aperture Jitter: 90 fS
  • Spectral Performance (fIN = 900 MHz, –2 dBFS):
    • SNR: 61.4 dBFS
    • SFDR: 71-dBc HD2, HD3
    • SFDR: 76-dBc Worst Spur
  • Spectral Performance (fIN = 1.85 GHz, –2 dBFS):
    • SNR: 58.5 dBFS
    • SFDR: 65-dBc HD2, HD3
    • SFDR: 75-dBc Worst Spur
  • On-Chip Digital Down-Converters:
    • Up to 2 DDCs (Dual-Band Mode)
    • Up to 3 Independent NCOs per DDC
  • On-Chip Input Clamp for Overvoltage Protection
  • Programmable On-Chip Power Detectors With Alarm Pins for AGC Support
  • On-Chip Dither
  • On-Chip Input Termination
  • Input Full-Scale: 1.35 VPP
  • Support for Multi-Chip Synchronization
  • JESD204B Interface:
    • Subclass 1-Based Deterministic Latency
    • 4 Lanes Support at 12.5 Gbps
  • Total Power Dissipation: 3.2 W at 3.0 GSPS
  • 72-Pin VQFN Package (10 mm × 10 mm)
  • 14-Bit, 3-GSPS ADC
  • Noise Floor: –155 dBFS/Hz
  • RF Input Supports Up To 4.0 GHz
  • Aperture Jitter: 90 fS
  • Spectral Performance (fIN = 900 MHz, –2 dBFS):
    • SNR: 61.4 dBFS
    • SFDR: 71-dBc HD2, HD3
    • SFDR: 76-dBc Worst Spur
  • Spectral Performance (fIN = 1.85 GHz, –2 dBFS):
    • SNR: 58.5 dBFS
    • SFDR: 65-dBc HD2, HD3
    • SFDR: 75-dBc Worst Spur
  • On-Chip Digital Down-Converters:
    • Up to 2 DDCs (Dual-Band Mode)
    • Up to 3 Independent NCOs per DDC
  • On-Chip Input Clamp for Overvoltage Protection
  • Programmable On-Chip Power Detectors With Alarm Pins for AGC Support
  • On-Chip Dither
  • On-Chip Input Termination
  • Input Full-Scale: 1.35 VPP
  • Support for Multi-Chip Synchronization
  • JESD204B Interface:
    • Subclass 1-Based Deterministic Latency
    • 4 Lanes Support at 12.5 Gbps
  • Total Power Dissipation: 3.2 W at 3.0 GSPS
  • 72-Pin VQFN Package (10 mm × 10 mm)

The ADC31RF80 device is a 14-bit, 3-GSPS, single-channel telecom receiver and feedback device that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC31RF80 delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.

The ADC31RF80 comes with a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.

The ADC31RF80 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).



The ADC31RF80 device is a 14-bit, 3-GSPS, single-channel telecom receiver and feedback device that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC31RF80 delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.

The ADC31RF80 comes with a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.

The ADC31RF80 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).



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Technical documentation

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Type Title Date
* Data sheet ADC31RF80 3-GSPS Telecom Receiver and Feedback Device datasheet PDF | HTML 23 Aug 2017
EVM User's guide ADC32RFxxEVM User's Guide (Rev. E) 31 Jan 2020
Application note Configuration Files for ADC32RF45, ADC32RF83, and ADC32RF80 (Rev. B) 05 Sep 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADC32RF80EVM — ADC32RF80 evaluation module for dual-channel, 14-bit, 3-GSPS, RF-sampling wideband receiver

The ADC32RF80 evaluation module (EVM) demonstrates the performance of a dual 3-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF80 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary (...)

User guide: PDF
Not available on TI.com
Firmware

TI-JESD204-IP — JESD204 Rapid Design IP for FPGAs connected to TI high-speed data converters

The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
Simulation model

ADC32RF45 IBIS Model

SBAM273.ZIP (46 KB) - IBIS Model
Simulation model

ADC32RF45 IBIS-AMI Model

SBAM274.ZIP (3109 KB) - IBIS-AMI Model
Calculation tool

FREQ-DDC-FILTER-CALC RF-Sampling Frequency Planner, Analog Filter, and DDC Excel Calculator

This Excel calculator provides system designers a way to simplify the design and debugging of direct RF-sampling receivers. It offers three functions: frequency planning, analog filtering, and decimation filter spur location.

In the concept phase, a frequency-planning tool enables fine tuning of (...)

Supported products & hardware

Supported products & hardware

Products
Receivers
ADC32RF80 Dual-channel, 14-bit, 3-GSPS, dual DDC/channel, RF-sampling wideband receiver and feedback IC ADC32RF82 Dual-channel, 14-bit, 2.45-GSPS, RF-sampling telecom receiver and feedback IC ADC32RF83 Dual-channel, 14-bit, 3-GSPS, single DDC/channel, RF-sampling wideband receiver and feedback IC
High-speed ADCs (≥10 MSPS)
ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (ADC) ADC12DJ2700 12-bit, dual 2.7-GSPS or single 5.4-GSPS, RF-sampling analog-to-digital converter (ADC) ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) ADC12DJ5200RF RF-sampling 12-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS ADC12J1600 12-Bit, 1.6-GSPS, RF Sampling Analog-to-Digital Converter (ADC) ADC12J2700 12-Bit, 2.7-GSPS, RF Sampling Analog-to-Digital Converter (ADC) ADC12J4000 12-Bit, 4.0-GSPS, RF Sampling Analog-to-Digital Converter (ADC) ADC31RF80 14-Bit, 3-GSPS, RF-Sampling Wideband Receiver and Feedback IC ADC32RF42 Dual-Channel, 14-Bit, 1.5-GSPS RF-Sampling Analog-to-Digital Converter (ADC) ADC32RF44 Dual-Channel, 14-Bit, 2.6-GSPS RF-Sampling Analog-to-Digital Converter (ADC) ADC32RF45 Dual-channel, 14-bit, 3-GSPS, RF-sampling analog-to-digital converter (ADC)
RF-sampling transceivers
AFE7422 2-transmit, 2-receive RF-sampling transceiver, 10-MHz to 6-GHz, max 1200-MHz IBW AFE7444 4-transmit, 4-receive RF-sampling transceiver, 10-MHz to 6-GHz, max 600-MHz IBW
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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VQFNP (RMP) 72 View options

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