ADC32J43 Dual-Channel, 14-Bit, 80-MSPS Analog-to-Digital Converter (ADC) | TI.com

ADC32J43 (ACTIVE)

Dual-Channel, 14-Bit, 80-MSPS Analog-to-Digital Converter (ADC)

Dual-Channel, 14-Bit, 80-MSPS Analog-to-Digital Converter (ADC) - ADC32J43
 

Description

The ADC32J4x are a high-linearity, ultra-low power, dual-channel, 14-bit, 50-MSPS to 160-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. A clock input divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC32J4x family supports JESD204B interface in order to reduce the number of interface lines, thus allowing high system integration density. The JESD204B interface is a serial interface, where the data of each ADC are serialized and output over only one differential pair. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock by 20 to derive the bit clock, which is used to serialize the 14-bit data from each channel. The devices support subclass 1 with interface speeds up to 3.2 Gbps.

Features

  • Dual Channel
  • 14-Bit Resolution
  • Single Supply: 1.8 V
  • Flexible Input Clock Buffer with Divide-by-1, -2, -4
  • SNR = 72.2 dBFS, SFDR = 87 dBc at
    fIN = 70 MHz
  • Ultralow Power Consumption:
    • 227 mW/Ch at 160 MSPS
  • Channel Isolation: 105 dB
  • Internal Dither
  • JESD204B Serial Interface:
    • Subclass 0, 1, 2 Compliant up to 3.2 Gbps
    • Supports One Lane per ADC up to 160 MSPS
  • Support for Multichip Synchronization
  • Pin-to-Pin Compatible with 12-Bit Version
    (ADC32J2X)
  • Package: VQFN-48 (7 mm × 7 mm)

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Parametrics Compare all products in High Speed ADCs (>10MSPS)

 
Sample Rate (Max) (MSPS)
Features
Resolution (Bits)
# Input Channels
SNR (dB)
ENOB (Bits)
SFDR (dB)
Power Consumption (Typ) (mW)
Input Range (Vp-p)
Interface
Operating Temperature Range (C)
Analog Input BW (MHz)
Input Buffer
Package Group
Package Size: mm2:W x L (PKG)
Rating
SINAD (dB)
Architecture
Reference Mode
ADC32J43 ADC32J22 ADC32J23 ADC32J24 ADC32J25 ADC32J42 ADC32J44 ADC32J45
80     50     80     125     160     50     125     160    
Low Power     Low Power     Low Power     Low Power     Low Power     Low Power     Low Power     Low Power    
14     12     12     12     12     14     14     14    
2     2     2     2     2     2     2     2    
73.1     70.7     70.6     70.9     70.6     73.2     73.6     71.7    
11.8     11.5     11.4     11.5     11.4     11.9     11.9     11.8    
95     100     95     90     89     100     90     85    
329     281     329     401     454     281     401     454    
2     2     2     2     2     2     2     2    
JESD204B     JESD204B     JESD204B     JESD204B     JESD204B     JESD204B     JESD204B     JESD204B    
-40 to 85     -40 to 85     -40 to 85     -40 to 85     -40 to 85     -40 to 85     -40 to 85     -40 to 85    
450     450     450     450     450     450     450     450    
No     No     No     No     No     No     No     No    
VQFN     VQFN     VQFN     VQFN     VQFN     VQFN     VQFN     VQFN    
48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)     48VQFN: 49 mm2: 7 x 7(VQFN)    
Catalog     Catalog     Catalog     Catalog     Catalog     Catalog     Catalog     Catalog    
73     70.7     70.5     70.8     70.3     73.2     72.9     71.5    
Pipeline     Pipeline