- The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.
The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit, 250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LB49 and ADS42LB69 provide excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.
14- and 16-Bit Resolution
Maximum Clock Rate: 250 MSPS
Analog Input Buffer with High Impedance Input
Flexible Input Clock Buffer with Divide-by-1, -2, and -4
2-VPP and 2.5-VPP Differential Full-Scale Input (SPI-Programmable)