ADS62P24 Dual-Channel, 12-Bit, 105-MSPS Analog-to-Digital Converter (ADC) | TI.com

ADS62P24 (ACTIVE)

Dual-Channel, 12-Bit, 105-MSPS Analog-to-Digital Converter (ADC)

Dual-Channel, 12-Bit, 105-MSPS Analog-to-Digital Converter (ADC) - ADS62P24
 

Description

ADS62P2X is a dual channel 12-bit A/D converter family with maximum sample rates up to 125 MSPS. It combines high performance and low power consumption in a compact 64 QFN package. Using an internal sample and hold and low jitter clock buffer, the ADC supports high SNR and high SFDR at high input frequencies. It has coarse and fine gain options that can be used to improve SFDR performance at lower full-scale input ranges.

ADS62P2X includes a digital processing block that consists of several useful and commonly used digital functions such as ADC offset correction, fine gain correction (in steps of 0.05 dB), decimation by 2,4,8 and in-built and custom programmable filters. By default, the digital processing block is bypassed, and its functions are disabled.

Two output interface options exist – parallel CMOS and DDR LVDS (Double Data Rate). ADS62P2X includes internal references while traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to 85°C).

Features

  • Maximum Sample Rate: 125 MSPS
  • 12-Bit Resolution with No Missing Codes
  • 95 dB Crosstalk
  • Parallel CMOS and DDR LVDS Output Options
  • 3.5 dB Coarse Gain and Programmable Fine Gain
    up to 6 dB for SNR/SFDR Trade-Off
  • Digital Processing Block with:
    • Offset Correction
    • Fine Gain Correction, in Steps of 0.05 dB
    • Decimation by 2/4/8
    • Built-in and Custom Programmable
      24-Tap Low-/High-/Band-Pass Filters
  • Supports Sine, LVPECL, LVDS, and LVCMOS Clocks and
    Amplitude Down to 400 mVPP
  • Clock Duty Cycle Stabilizer
  • Internal Reference; Supports External Reference also
  • 64-QFN Package (9mm × 9mm)
  • Pin Compatible 14-Bit Family (ADS62P4X)

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Parametrics Compare all products in High speed ADCs (>10MSPS)

 
Sample Rate (Max) (MSPS)
Features
Resolution (Bits)
Number of input channels
SNR (dB)
ENOB (Bits)
SFDR (dB)
Power Consumption (Typ) (mW)
Input Range (Vp-p)
Interface
Operating Temperature Range (C)
Analog Input BW (MHz)
Input Buffer
Package Group
Package Size: mm2:W x L (PKG)
Rating
Architecture
DNL (Typ) (+/-LSB)
INL (Typ) (+/-LSB)
Reference Mode
ADS62P24 ADS62P15 ADS62P19 ADS62P22 ADS62P23 ADS62P25 ADS62P28 ADS62P29 ADS62P42 ADS62P43 ADS62P44 ADS62P45 ADS62P48 ADS62P49
105     125     250     65     80     125     210     250     65     80     105     125     210     250    
High Performance     Low Power     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance     High Performance    
12     11     11     12     12     12     12     12     14     14     14     14     14     14    
2     2     2     2     2     2     2     2     2     2     2     2     2     2    
70.8     67.1     65.9     71.3     71.2     70.8     70.6     70.5     74.3     74.2     73.8     73.8     73     73    
11.4     10.8     10.6     11.4     11.4     11.4     11     11.1     12     11.9     11.8     11.8     11.4     11.3    
86     84     88     88     88     85     85     85     88     88     86     85     85     85    
700     740     1250     518     587     792     1140     1250     518     587     700     792     1140     1250    
2     2     2     2     2     2     2     2     2     2     2     2     2     2