20-Bit, 1-MSPS, SAR ADC with Internal Reference Buffer, Internal LDO & multiSPI™ Digital Interface - ADS8900B

ADS8900B (ACTIVE)

20-Bit, 1-MSPS, SAR ADC with Internal Reference Buffer, Internal LDO & multiSPI™ Digital Interface

 

Description

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

Features

  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

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Parametrics Compare all products in Precision ADCs (<=10MSPS)

 
Resolution (Bits)
Sample Rate (max) (SPS)
# Input Channels
Input Type
Power Consumption (Typ) (mW)
Input Range (Min) (V)
Input Range (Max) (V)
Interface
Integrated Features
Analog Voltage AVDD (Min) (V)
Analog Voltage AVDD (Max) (V)
Architecture
Operating Temperature Range (C)
Pin/Package
THD (Typ) (dB)
SNR (dB)
Reference Mode
ADS8900B ADS8881 ADS8902B ADS8904B ADS8910B ADS8912B ADS8914B ADS8920B ADS8922B ADS8924B
20    18    20    20    18    18    18    16    16    16   
1MSPS    1MSPS    500kSPS    250kSPS    1MSPS    500kSPS    250kSPS    1MSPS    500kSPS    250kSPS   
1    1    1    1    1    1    1    1    1    1   
Differential    Differential    Differential    Differential    Differential    Differential    Differential    Differential    Differential    Differential   
21    5.5    16    14    21    16    14    21    16    14   
-5    -5    -5    -5    -5    -5    -5    -5    -5    -5   
5    5    5    5    5    5    5    5    5    5   
SPI    SPI    SPI    SPI    SPI    SPI    SPI    SPI    SPI    SPI   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
Daisy-Chainable
Oscillator   
3    2.7    3    3    3    3    3    3    3    3   
5.5    3.6    5.5    5.5    5.5    5.5    5.5    5.5    5.5    5.5   
SAR    SAR    SAR    SAR    SAR    SAR    SAR    SAR    SAR    SAR   
-40 to 125    -40 to 85
0 to 70   
-40 to 125    -40 to 125    -40 to 125    -40 to 125    -40 to 125    -40 to 125    -40 to 125    -40 to 125   
24VQFN    10VSON
10VSSOP   
24VQFN    24VQFN    24VQFN    24VQFN    24VQFN    24VQFN    24VQFN    24VQFN   
-125    -115    -125    -125    -125    -125    -125    -125    -125    -125   
104.5    100    104.5    104.5    102.5    102.5    102.5    96.8    96.8    96.8   
Ext    Ext    Ext    Ext    Ext    Ext    Ext    Ext    Ext    Ext