The AFE58JD16 is a highly-integrated, analog front-end (AFE) solution specifically designed for ultrasound systems where high performance, low power, and small size are required.
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The AFE58JD16 is an integrated analog front-end (AFE) optimized for medical ultrasound application. The AFE58JD16 is a multichip module (MCM) device with two dies: VCA and ADC_CONV. Each die has total of 16 channels.
Each channel in the VCA die can be configured in two modes: time gain compensation (TGC) mode and continuous wave (CW) mode. In TGC mode, each channel includes an input attenuator (ATTEN), a low-noise amplifier (LNA) with variable-gain, and a third-order, low-pass filter (LPF). The attenuator supports an attenuation range of 8 dB to 0 dB, and the LNA supports gain ranges from 14 dB to 45 dB. The LPF cutoff frequency can be configured at 10 MHz, 15 MHz, 20 MHz, or 25 MHz to support ultrasound applications with different frequencies. In CW mode, each channel includes an LNA with a fixed gain of 18 dB, and a low-power passive mixer with 16 selectable phase delays. Different phase delays can be applied to each analog input signal to perform an on-chip beamforming operation. A harmonic filter in the CW mixer suppresses the third and fifth harmonic to enhance the sensitivity of the CW Doppler measurement. CW mode supports three clock modes: 16X, 8X, and 4X.
Each channel of the ADC_CONV die has a high-performance analog-to-digital converter (ADC) with a programmable resolution of 14 bits or 12 bits. The ADC achieves 75-dBFS signal-to-noise ratio (SNR) in 14-bit mode, and 72-dBFS SNR in 12-bit mode. This ADC provides excellent SNR at low-channel gain. The devices operate at maximum speeds of 65 MSPS and 80 MSPS, providing 14-bit and 12-bit output, respectively. The ADC is designed to scale power with sampling rate. The output interface of the ADC is a low-voltage differential signaling (LVDS) or JESD interface that can easily interface with low-cost field-programmable gate arrays (FPGAs).
The AFE58JD16 includes an optional digital demodulator and JESD204B data packing blocks after the 12- or 14- bit ADC. The digital in-phase and quadrature (I/Q) demodulator with programmable fractional decimation filters accelerates computationally-intensive algorithms at low power. The device also supports an optional JESD204B interface that runs up to 5 Gbps and further reduces the circuit-board routing challenges in high-channel count systems.
The AFE58JD16 also allows various power and noise combinations to be selected for optimizing system performance. Therefore, these devices are suitable ultrasound AFE solutions for systems with strict battery-life requirements. The AFE58JD16 is available in a 15-mm \xD7 15-mm NFBGA-289 package (ZAV package, S-PBGAN289) and is specified for operation from \x9640\xB0C to +85\xB0C. The device pinout is also similar to the AFE5818 family.
|# Input Channels|
|Active Supply Current (Typ) (mA)|
|Supply Voltage (Max)|
|Supply Voltage (Min)|
|Operating Temperature Range (C)|
|Package Size: mm2:W x L (PKG)|
|Approx. Price (US$)|
| JESD204B |
|Serial LVDS||LVDS||LVDS||LVDS|| JESD204B |
| JESD204B |
|-40 to 85||0 to 85||-40 to 85||-40 to 85||0 to 85||-40 to 85||-40 to 85|
|289NFBGA: 225 mm2: 15 x 15(NFBGA)||135NFBGA: 135 mm2: 15 x 9(NFBGA)||289NFBGA: 225 mm2: 15 x 15(NFBGA)||289NFBGA: 225 mm2: 15 x 15(NFBGA)||289NFBGA: 225 mm2: 15 x 15(NFBGA)||289NFBGA: 225 mm2: 15 x 15(NFBGA)||289NFBGA: 225 mm2: 15 x 15(NFBGA)|
|200.00 | 1ku||58.00 | 1ku||120.00 | 1ku||130.00 | 1ku||115.05 | 1ku||215.00 | 1ku||172.55 | 1ku|
|Analog Front End (AFE)||Analog Front End (AFE)||Analog Front End (AFE)||Analog Front End (AFE)||Analog Front End (AFE)||Analog Front End (AFE)||Analog Front End (AFE)|
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