SLUSBK2G October 2013  – May 2016

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. 

  1. Introduction
    1. 1.1Features
    2. 1.2Applications
    3. 1.3Description
    4. 1.4Simplified System Diagram
  2. Revision History
  3. Description (Continued)
  4. Device Comparison Table
  5. Pin Configuration and Functions
    1. 5.1Versions
    2. 5.2bq76920 Pin Diagram
      1. 5.2.1bq76920 Pin Map
    3. 5.3bq76930 Pin Diagram
      1. 5.3.1bq76930 Pin Map
    4. 5.4bq76940 Pin Diagram
      1. 5.4.1bq76940 Pin Map
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Timing Requirements
    7. 6.7Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Subsystems
        1. 7.3.1.1Measurement Subsystem Overview
          1. 7.3.1.1.1Data Transfer to the Host Controller
          2. 7.3.1.1.214-Bit ADC
            1. 7.3.1.1.2.1Optional Real-time Calibration Using the Host Microcontroller
          3. 7.3.1.1.316-Bit CC
          4. 7.3.1.1.4External Thermistor
          5. 7.3.1.1.5Die Temperature Monitor
          6. 7.3.1.1.616-Bit Pack Voltage
          7. 7.3.1.1.7System Scheduler
        2. 7.3.1.2Protection Subsystem
          1. 7.3.1.2.1Integrated Hardware Protections
          2. 7.3.1.2.2Reduced Test Time
        3. 7.3.1.3Control Subsystem
          1. 7.3.1.3.1FET Driving (CHG AND DSG)
          2. 7.3.1.3.2Load Detection
          3. 7.3.1.3.3Cell Balancing
          4. 7.3.1.3.4Alert
          5. 7.3.1.3.5Output LDO
        4. 7.3.1.4Communications Subsystem
    4. 7.4Device Functional Modes
      1. 7.4.1NORMAL Mode
      2. 7.4.2SHIP Mode
    5. 7.5Register Maps
      1. 7.5.1Register Details
      2. 7.5.2Read-Only Registers
  8. Application and Implementation
    1. 8.1Application Information
      1. 8.1.1Configuring Alternative Cell Counts
    2. 8.2Typical Applications
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
        1. 8.2.2.1Step-by-Step Design Procedure
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Documentation Support
      1. 11.1.1Related Documentation
    2. 11.2Related Links
    3. 11.3Community Resources
    4. 11.4Trademarks
    5. 11.5Electrostatic Discharge Caution
    6. 11.6Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Introduction

Features

  • AFE Monitoring Features
    • Pure Digital Interface
    • Internal ADC Measures Cell Voltage, Die Temperature, and External Thermistor
    • A Separate, Internal ADC Measures Pack Current (Coulomb Counter)
    • Directly Supports up to Three Thermistors (103AT)
  • Hardware Protection Features
    • Overcurrent in Discharge (OCD)
    • Short Circuit in Discharge (SCD)
    • Overvoltage (OV)
    • Undervoltage (UV)
    • Secondary Protector Fault Detection
  • Additional Features
    • Integrated Cell Balancing FETs
    • Charge, Discharge Low-Side NCH FET Drivers
    • Alert Interrupt to Host Microcontroller
    • 2.5-V or 3.3-V Output Voltage Regulator
    • No EEPROM Programming Necessary
    • High Supply Voltage Absolute Maximum (Up to 108 V)
    • Simple I2C™ Compatible Interface (CRC Option)
    • Random Cell Connection Tolerant

Applications

  • Light Electric Vehicles (LEV): eBikes, eScooters, Pedelec, and Pedal-Assist Bicycles
  • Power and Gardening Tools
  • Battery Backup and UPS Systems
  • Wireless Base Station Backup Systems
  • 12-V, 18-V, 24-V, 36-V, and 48-V Battery Packs

Description

The bq769x0 family of robust analog front-end (AFE) devices serves as part of a complete packmonitoring and protection solution for next-generation, high-power systems, such as light electric vehicles, power tools, and uninterruptible power supplies. The bq769x0 is designed with low power in mind: Sub-blocks within the IC may be enabled/disabled to control the overall chip current consumption, and a SHIP mode provides a simple way to put the pack into an ultra-low power state.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
bq76920TSSOP (20) 6.50 mm × 4.40 mm
bq76930TSSOP (30)7.80 mm × 4.40 mm
bq76940TSSOP (44)11.00 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified System Diagram

bq76920 bq76930 bq76940 SimpAppSchem_20.gif