SLUSAD3C June 2011  – October 2016

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Timing Characteristics - AC SPI Data Interface
    7. 6.7Vertical Communications Bus
    8. 6.8Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Analog-to-Digital Conversion (ADC)
        1. 7.3.1.1 General Features
        2. 7.3.1.2 3-to-6 Series Cell Configuration
        3. 7.3.1.3 Cell Voltage Measurements
        4. 7.3.1.4 GPAI or VBAT Measurements
          1. 7.3.1.4.1Converting GPAI Result to Voltage
          2. 7.3.1.4.2Converting VBAT Result to Voltage
        5. 7.3.1.5 Temperature Measurement
          1. 7.3.1.5.1External Temperature Sensor Support (TS1+, TS1-, TS2+, and TS2-)
          2. 7.3.1.5.2Converting TSn Result to Voltage (Ratio)
        6. 7.3.1.6 ADC Band-Gap Voltage Reference
        7. 7.3.1.7 Conversion Control
          1. 7.3.1.7.1Convert Start
            1. 7.3.1.7.1.1Hardware Start
            2. 7.3.1.7.1.2Firmware Start
          2. 7.3.1.7.2Data Ready
          3. 7.3.1.7.3ADC Channel Selection
          4. 7.3.1.7.4Conversion Time Control
          5. 7.3.1.7.5Automatic Versus Manual Control
        8. 7.3.1.8 Secondary Protection
          1. 7.3.1.8.1Protector Functionality
            1. 7.3.1.8.1.1Using the Protector Functions With 3-5 Cells
        9. 7.3.1.9 Cell Overvoltage Fault Detection (COV)
        10. 7.3.1.10Cell Undervoltage Fault Detection (CUV)
        11. 7.3.1.11Overtemperature Detection
          1. 7.3.1.11.1Ratiometric Sensing
          2. 7.3.1.11.2Thermistor Power
          3. 7.3.1.11.3Thermistor Input Conditioning
        12. 7.3.1.12Fault and Alert Behavior
          1. 7.3.1.12.1Fault Recovery Procedure
        13. 7.3.1.13Secondary Protector Built-In Self-Test Features
      2. 7.3.2Cell Balancing
        1. 7.3.2.1Cell Balance Control Safety Timer
      3. 7.3.3Other Features and Functions
        1. 7.3.3.1Internal Voltage Regulators
          1. 7.3.3.1.1Internal 5-V Analog Supply
          2. 7.3.3.1.2Internal 5-V Digital Supply
          3. 7.3.3.1.3Low-Dropout Regulator (REG50)
          4. 7.3.3.1.4Auxiliary Power Output (AUX)
        2. 7.3.3.2Undervoltage Lockout and Power-On Reset
          1. 7.3.3.2.1UVLO
          2. 7.3.3.2.2Power-On Reset (POR)
          3. 7.3.3.2.3Reset Command
        3. 7.3.3.3Thermal Shutdown (TSD)
        4. 7.3.3.4GPIO
      4. 7.3.4Communications
        1. 7.3.4.1SPI Communications - Device to Host
      5. 7.3.5Device-to-Device Vertical Bus (VBUS) Interface
      6. 7.3.6Packet Formats
        1. 7.3.6.1Data Read Packet
        2. 7.3.6.2Data Write Packet
        3. 7.3.6.3Broadcast Writes
        4. 7.3.6.4Communications Packet Structure
        5. 7.3.6.5CRC Algorithm
        6. 7.3.6.6Data Packet Usage Examples
      7. 7.3.7Device Addressing
      8. 7.3.8Changes and Enhancements for bq76PL536A
    4. 7.4Device Functional Modes
      1. 7.4.1SLEEP Functionality
        1. 7.4.1.1SLEEP State Entry (Bit Set)
        2. 7.4.1.2Sleep State Exit (Bit Reset)
    5. 7.5Programming
      1. 7.5.1Programming the EPROM Configuration Registers
    6. 7.6Register Maps
      1. 7.6.1 I/O Register Details
      2. 7.6.2 Register Types
        1. 7.6.2.1Read-Only (Group 1)
        2. 7.6.2.2Read / Write (Group 2)
        3. 7.6.2.3Read / Write, Initialized From EPROM (Group3)
        4. 7.6.2.4Error Checking and Correcting (ECC) EPROM
      3. 7.6.3 Register Details
        1. 7.6.3.1DEVICE_STATUS Register (0x00)
      4. 7.6.4 GPAI (0x01, 0x02) Register
      5. 7.6.5 VCELLn Register (0x03…0x0e)
      6. 7.6.6 TEMPERATURE1 Register (0x0f, 0x10)
      7. 7.6.7 TEMPERATURE2 Register (0x11, 0x12)
      8. 7.6.8 ALERT_STATUS Register (0x20)
      9. 7.6.9 FAULT_STATUS Register (0x21)
      10. 7.6.10COV_FAULT Register (0x22)
      11. 7.6.11CUV_FAULT Register (0x23)
      12. 7.6.12PARITY_H Register (0x24) (PRESULT_A (R/O))
      13. 7.6.13PARITY_H Register (0x25) (PRESULT_B (R/O))
      14. 7.6.14ADC_CONTROL Register (0x30)
      15. 7.6.15IO_CONTROL Register (0x31)
      16. 7.6.16CB_CTRL Register (0x32)
      17. 7.6.17CB_TIME Register (0x33)
      18. 7.6.18ADC_CONVERT Register (0x34)
      19. 7.6.19SHDW_CTRL Register (0x3a)
      20. 7.6.20ADDRESS_CONTROL Register (0x3b)
      21. 7.6.21RESET Register (0x3c)
      22. 7.6.22TEST_SELECT Register (0x3d)
      23. 7.6.23E_EN Register (0x3f)
      24. 7.6.24FUNCTION_CONFIG Register (0x40)
      25. 7.6.25IO_CONFIG Register (0x41)
      26. 7.6.26CONFIG_COV Register (0x42)
      27. 7.6.27CONFIG_COVT Register (0x43)
      28. 7.6.28CONFIG_UV Register (0x44)
      29. 7.6.29CONFIG_CUVT Register (0x45)
      30. 7.6.30CONFIG_OT Register (0x46)
      31. 7.6.31CONFIG_OTT Register (0x47)
      32. 7.6.32USERx Register (0x48-0x4b) (USER1-4)
  8. Application and Implementation
    1. 8.1Application Information
      1. 8.1.1Anti-Aliasing Filter
      2. 8.1.2Host SPI Interface Pin States
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
      3. 8.2.3Application Curves
    3. 8.3Other Schematics
  9. Power Supply Recommendations
    1. 9.1Power Supply Decoupling
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Receiving Notification of Documentation Updates
    2. 11.2Community Resources
    3. 11.3Trademarks
    4. 11.4Electrostatic Discharge Caution
    5. 11.5Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Features

  • 3-to-6 Series Cell Support, All Chemistries
  • Hot-Pluggable
  • High-Speed Serial Peripheral Interface (SPI) for Data Communications
  • Stackable Vertical Interface
  • Isolation Components not Required Between Devices
  • Industrial Temperature Range –40°C to 85°C
  • High-Accuracy Analog-to-Digital Converter (ADC):
    • ±1 mV Typical Accuracy
    • 14-Bit Resolution, 6-µs Conversion Time
    • Nine ADC Inputs: 6 Cell Voltages, 1 Six-Cell Brick Voltage, 2 Temperatures, 1 General-Purpose Input
    • Dedicated Pins for Synchronizing Measurements
  • Configuration Data Stored in Error Check/Correct (ECC)-One-Time-Programmable (OTP) Registers
  • Built-In Comparators (Secondary Protector) for:
    • Overvoltage and Undervoltage Protection
    • Overtemperature Protection
    • Programmable Thresholds and Delay Times
    • Dedicated Fault Output Signals
  • Cell Balancing Control Outputs With Safety Timeout
    • Balance Current Set by External Components
  • Supply Voltage Range from 6 V to 30 V Continuous and 36-V Peak
  • Low Power:
    • Typical 12-µA Sleep, 45-µA Idle
  • Integrated Precision 5-V, 3-mA LDO

Applications

  • Uninterruptible Power Systems (UPS)
  • E-Bike and E-Scooter
  • Large-Format Battery Systems

Description

The bq76PL536A device is a stackable battery monitor and protector for three-to-six lithium-ion cells in series. The bq76PL536A integrates an analog front end (AFE) along with a precision analog-to-digital converter (ADC), used to precisely measure battery cell voltages. A separate ADC is used to measure temperature.

In addition to temperature measurement, overvoltage and undervoltage are monitored per channel for protection. Non-volatile memory stores the user-programmable protection thresholds and delay times. A FAULT output signals whenever one of these thresholds is exceeded.

Cell stacks of 192 cells can be supported by stacked bq76PL536A devices. A high-speed SPI interface connects all devices.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
bq76PL536AHTQFP (64)10.00 mm × 10.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

bq76PL536A sys_conn_LUSAD3.gif