CDCLVP110 1:10 LVPECL/HSTL to LVPECL Clock Driver | TI.com

CDCLVP110 (ACTIVE)

1:10 LVPECL/HSTL to LVPECL Clock Driver

 

Special note

CDCLVP110MVFR has non-standard pin 1 orientation in the 1st quadrant instead of the 2nd quadrant for VFR package

Description

The CDCLVP110 clock driver distributes one differential clock pair of either LVPECL or HSTL (selectable) input, (CLK0, CLK1) to ten pairs of differential LVPECL clock (Q0, Q9) outputs with minimum skew for clock distribution. The CDCLVP110 can accept two clock sources into an input multiplexer. The CLK0 input accepts either LVECL/LVPECL input signals, while CLK1 accepts an HSTL input signal when operated under LVPECL conditions. The CDCLVP110 is specifically designed for driving 50-Ω transmission lines.

The VBB reference voltage output is used if single-ended input operation is required. In this case the VBB pin should be connected to CLK0 and bypassed to GND via a 10-nF capacitor.

However, for high-speed performance up to 3.5 GHz, the differential mode is strongly recommended.

The CDCLVP110 is characterized for operation from –40°C to 85°C.

Features

  • Distributes One Differential Clock Input Pair
    LVPECL/HSTL to 10 Differential LVPECL Clock Outputs
  • Fully Compatible With LVECL/LVPECL/HSTL
  • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply
  • Selectable Clock Input Through CLK_SEL
  • Low-Output Skew (Typ 15 ps) for Clock-Distribution Applications
  • VBB Reference Voltage Output for Single-Ended Clocking
  • Available in a 32-Pin LQFP Package
  • Frequency Range From DC to 3.5 GHz
  • Pin-to-Pin Compatible With MC100 Series EP111, ES6111, LVEP111, PTN1111

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Parametrics Compare all products in Differential

 
Additive RMS jitter (Typ) (fs)
Output frequency (Max) (MHz)
Input level
Number of outputs
Output level
VCC (V)
VCC out (V)
Input frequency (Max) (MHz)
Operating temperature range (C)
Rating
CDCLVP110 CDCLVP111 CDCLVP215 CDCP1803 CDCVF111
300     40     300     150     N/A    
3500     3500     3500     800     650    
HSTL
LVPECL    
CML
LVDS
LVPECL
SSTL    
LVPECL     LVPECL     LVPECL    
10     10     10     3     9    
LVPECL     LVPECL     LVPECL     LVPECL     LVPECL    
2.5
3.3    
2.5
3.3    
2.5
3.3    
3.3     3.3    
2.5
3.3    
2.5
3.3    
2.5
3.3    
3.3     3.3    
3500     3500     3500     800     650    
-40 to 85     -40 to 85     -40 to 85     -40 to 85     -40 to 85    
Catalog     Catalog     Catalog     Catalog     Catalog    

Design tool

Design with CDCLVP110

Frequency Number of Outputs
 MHz
Output Format