Processor with Cache, DSP,Bluetooth, USB, Dual CAN Interface

Processor with Cache, DSP,Bluetooth, USB, Dual CAN Interface - CP3SP33


The CP3SP33 connectivity processor combines high performance with the massive integration needed for embedded Bluetooth applications. A powerful RISC core with 4Kbyte instruction cache and a Teak® DSP coprocessor provides high computing bandwidth, DMA-driven hardware communications peripherals provide high I/O bandwidth, and an external bus provides system expandability.

On-chip communications peripherals include: Bluetooth Lower Link Controller, Universal Serial Bus (2.0) OTG node and host controller, dual CAN, dual Microwire/Plus/SPI, dual ACCESS.bus, quad UART, 10-bit A/D converter, and telematics/audio codec. Additional on-chip peripherals include DMA controller, dual CVSD/PCM conversion module, I2S and AAI digital audio bus interfaces, Timing and Watchdog Unit, dual Versatile Timer Unit, dual Multi-Function Timer, and Multi-Input Wake-Up (MIWU) unit.

In addition to providing the features needed for the next generation of embedded Bluetooth products, the CP3SP33 is backed up by the software resources that designers need for rapid time-to-market, including an operating system, Bluetooth protocol stack implementation, peripheral drivers, reference designs, and an integrated development environment. Combined with an external program memory and a Bluetooth radio transceiver such as National’s LMX5252, the CP3SP33 provides a complete Bluetooth system solution.

National Semiconductor offers a complete and industry proven application development environment for CP3SP33 applications, including the IAR Embedded Workbench, iSYSTEM winIDEA and iC3000 Active Emulator, Bluetooth Development Board, Bluetooth protocol stack, and application examples.


  • CPU Features
    • Fully static RISC processor core,
      capable of operating from 0 to 96 MHz
      with zero wait/hold state
    • Minimum 10.4 ns instruction cycle time
      with a 96-MHz internal clock frequency,
      based on a 12-MHz external input
    • 4K-byte, 4-way set-associative
      instruction cache
    • 69 independently vectored peripheral
  • DSP Features
    • Capable of operating up to 96 MHz
    • 16-bit fixed-point arithmetic, dual-MAC
    • 32-bit interface to 4K-byte RAM shared with
    • 32-bit external bus interface
    • Bus master interface to audio peripherals
      and I/O
  • Memory
    • 4K bytes CPU instructioncache
    • 32K bytes CPU data RAM
    • 4K bytes CPU/DSP shared RAM
    • 24K bytes DSP program RAM
    • 24K bytes DSP data RAM
    • 8K bytes Bluetooth sequencer and data RAM
    • Addresses up to 96M bytes (FBGA-224 package)
      or 8M bytes (FBGA-144 package) of external
  • Broad Range of Hardware Communications Peripherals
    • Bluetooth Lower Link Controller (LLC)
      including a shared 7K byte Bluetooth data
      RAM and 1K byte Bluetooth Sequencer RAM
    • Universal Serial Bus (USB) 2.0 On-The-Go
    • Audio/telematics codec with dual ADC inputs
      and high quality stereo DAC output
    • Two CAN interfaces with 15 message buffers
      conforming to CAN specification 2.0B active
    • Two ACCESS.bus serial bus interfaces (I2C compatible)
    • Two 8/16-bit SPI, Microwire/Plus serial interfaces
    • I2S digital audio bus interface
    • Four Universal Asynchronous Receiver/Transmitter (UART)
      channels, one channel has USART capability
    • Advanced Audio Interface (AAI) to connect to external
      8/ 13-bit PCM Codecs as well as to ISDN-Controllers
      through the IOM-2 interface (slave only)
    • Two CVSD/PCM converters, for supporting two bidirectional
      audio connections
  • External Bus Interface Shared Between CPU and DSP
    • 16/32-bit data busbus interface
    • 23-bit address bus
    • 3 programmable chip select outputs
    • Up to 96M bytes external memory
    • 8-level write buffer
  • General-Purpose Hardware Peripherals
    • 10-channel, 10-bit A/D Converter (ADC)
    • 16-channel DMA controller
    • Dual 16-bit Multi-Function Timer (MFT)
    • Dual Versatile Timer Units (VTU), each with four
      independent timers
    • Timing and Watchdog Unit
  • Extensive Power and Clock Management Support
    • Two Phase Locked Loops (PLL) for synthesizing independent
      system and audio peripheral clocks
    • Two independent oscillators for Active mode
      (12 MHz) and Power Save mode (32.768 kHz) clocks
    • Low-power modes (Power Save, Idle, and Halt) for
      slowing or stopping clocks to optimize power
      consumption while meeting application needs
  • Flexible I/O
    • Up to 64 general-purpose I/O pins (shared with on-chip
      peripheral I/O)
    • Programmable I/O pin characteristics: TRI-STATE output,
      push-pull output, weak pullup/pulldown input, high
      impedance input, high-speed drive capability
    • Schmitt triggers on general-purpose inputs
    • Multi-Input Wake-Up (MIWU) capability…
  • Power Supply
    • I/O port operation at 3.0–3.3V
    • Core logic operation at 1.8V
    • On-chip power-on reset
  • Temperature Range
    • –40°C to +85°C (Industrial)
  • Packages
    • FBGA-224, FBGA-144
  • Complete Development Environment
    • Pre-integrated hardware and software support for
      rapid prototyping and production
    • Multi-file C source editor, source debugger,
      and project manager
    • Comprehensive, integrated, one-stop technical support
  • Bluetooth Protocol Stack
    • Applications can interface to the high-level
      protocols or directly to the low-level Host
      Controller Interface (HCI)
    • Transport layer support allows HCI command-based
      interface over UART port
    • Baseband (Link Controller) hardware minimizes
      the bandwidth demand on the CPU
    • Link Manager (LM)
    • Logical Link Control and Adaptation Protocol
    • Service Discovery Protocol (SDP)
    • RFCOMM Serial Port Emulation Protocol
    • All packet types, piconet, and scatternet

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