0.7 XGA 2xLVDS Type-A DMD - DLP7000


0.7 XGA 2xLVDS Type-A DMD

Recommended alternative parts

  • DLP9500  - The device has the SAME FUNCTIONALITY as the compared device, but is not pin-for-pin equivalent and may not be parametrically equivalent.   Similar to DLP7000 with higher resolution


The 0.7 XGA Chipset is part of the DLP Discovery 4100 platform, which enables high resolution and high performance spatial light modulation. The DLP7000 is the digital micromirror device (DMD) at the heart of the 0.7 XGA chipset, and currently supports the fastest pattern rates in the DLP catalog portfolio. The DLP Discovery 4100 platform also provides the highest level of individual micromirror control with the option for random row addressing. Combined with a hermetic package, the unique capability and value offered by DLP7000 makes it well suited to support a wide variety of industrial, medical, and advanced display applications.

In addition to the DLP7000 DMD, the 0.7 XGA Chipset includes these dedicated components (see ):

  • 1 unit DLPC410 (DLP Discovery 4100 Digital Controller)
  • 1 unit DLPR410 / DLPR4101 (DLP Discovery 4100 Configuration PROM)
  • 1 unit DLPA200 (DMD Micromirror Driver)

Reliable function and operation of the DLP7000 requires that it be used in conjunction with the other components of the chipset. A dedicated chipset provides developers easier access to the DMD as well as high speed, independent micromirror control.

DLP7000 is a digitally controlled MOEMS (micro-opto-electromechanical system) spatial light modulator (SLM). When coupled to an appropriate optical system, the DLP7000 can be used to modulate the amplitude, direction, and/or phase of incoming light.

Electrically, the DLP7000 consists of a two-dimensional array of 1-bit CMOS memory cells, organized in a grid of 1024 memory cell columns by 768 memory cell rows. The CMOS memory array is addressed on row-by-row basis, over two 16-bit Low Voltage Differential Signaling (LVDS) double data rate (DDR) buses. Addressing is handled via a serial control bus. The specific CMOS memory access protocol is handled by the DLPC410 digital controller.


  • 0.7-Inch Diagonal Micromirror Array
    • 1024 x 768 Array of Aluminum, Micrometer-Sized Mirrors
    • 13.68-µm Micromirror Pitch
    • ±12° Micromirror Tilt Angle (Relative to Flat State)
    • Designed for Corner Illumination
  • Designed for Use With Broadband Visible Light (400 nm–700 nm):
    • Window Transmission 97% (Single Pass, Through Two
      Window Surfaces)
    • Micromirror Reflectivity 88%
    • Array Diffraction Efficiency 86%
    • Array Fill Factor 92%
  • Two 16-Bit, Low Voltage Differential Signaling (LVDS)
    Double Data Rate (DDR) input data buses
  • Up to 400 MHz Input Data Clock Rate
  • 40.6-mm by 31.8-mm by 6.0-mm Package Footprint
  • Hermetic Package

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Parametrics Compare all products in Pattern Rate (>=8 kHz)

Chipset Family
Component Type
Illumination Wavelength Range (nm)
Max Display Resolution
Max Pattern Rate, Binary (Hz)
Micromirror Array Orientation
Micromirror Array Size
Micromirror Driver Support
Micromirror Pitch (um)
Package Group

Featured tools and software

Companion parts

Part # Name Product Family Comments
DLPA200   DMD Micromirror Driver   Advanced Light Control - Micromirror Array (>=1 Million)    DMD Micromirror Driver  
DLPC410   DLP Discovery 4100 DMD Controller   Advanced Light Control - Pattern Rate (>=8 kHz)    Digital Controller for the DLP7000  
DLPR410   DLP Discovery 4100 Configuration PROM   Advanced Light Control - Pattern Rate (>=8 kHz)    Configuration PROM  
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