The DRV870x-Q1 family of devices is a single H-bridge gate driver that uses four external N-channel MOSFETs targeted to drive a bidirectional brushed-DC motor.
A PH/EN, independent H-Bridge, or PWM interface allows simple interfacing to controller circuits. An internal sense amplifier provides adjustable current control. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping.
The DRV870x-Q1 family of devices drives both high-side and low-side FETs with a 10.5-V VGS gate drive. The gate-drive current for all external FETs is configurable with a single external resistor or through the serial peripheral interface (SPI).
A low-power sleep mode is provided which shuts down internal circuitry to achieve a very-low
quiescent-current draw.
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| Vs (Min) (V) |
| Vs (Max) (V) |
| Peak Output Sink Current Gate Drive (Max) (A) |
| Peak Output Source Current Gate Drive (Max) (A) |
| Control I/F |
| Features |
| Rating |
| DRV8702-Q1 | DRV8702D-Q1 | DRV8703-Q1 | DRV8703D-Q1 | DRV8704 |
|---|---|---|---|---|
| 5.5 | 5.5 | 5.5 | 5.5 | 8 |
| 45 | 45 | 45 | 45 | 52 |
| 0.5 | 0.5 | 0.5 | 0.5 | 0.4 |
| 0.25 | 0.25 | 0.25 | 0.25 | 0.2 |
| PHASE/ENABLE PWM Independent 1/2-H PWM | Independent 1/2-H PWM | PHASE/ENABLE PWM Independent 1/2-H PWM | Independent 1/2-H PWM | PWM |
| Adjustable Gate Drive Settings Integrated Current Shunt Amplifier Low-Power Sleep Mode | Adjustable Gate Drive Settings Integrated Current Shunt Amplifier Low-Power Sleep Mode | Adjustable Gate Drive Settings SPI Interface Integrated Current Shunt Amplifier Low-Power Sleep Mode | Adjustable Gate Drive Settings SPI Interface Integrated Current Shunt Amplifier Watch Dog Low-Power Sleep Mode | Automatic Mixed Decay Mode Adjustable Gate Drive Settings 5V Integrated LDO Low-Power Sleep Mode Highly Configurable SPI |
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