The DS90UB933-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB933-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.
Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.
|Color Depth (bpp)|
|Pixel Clock Min (MHz)|
|Total Throughput (Mbps)|
|Operating Temperature Range (C)|
|Package Size: mm2:W x L (PKG)|
|LVCMOS||MIPI CSI-2||MIPI CSI-2|
|FPD-Link III LVDS|
|CRC,Dedicated GPIO,FPD-Link III Coax,I2C Config,Pattern Generator||
FPD-Link III Coax
|-40 to 105||-40 to 105||-40 to 105|
|WQFN | 32||VQFN | 32||VQFN | 32|
|32WQFN: 25 mm2: 5 x 5 (WQFN | 32)||32VQFN: 25 mm2: 5 x 5 (VQFN | 32)||32VQFN: 25 mm2: 5 x 5 (VQFN | 32)|
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