DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver | TI.com

DSLVDS1048 (ACTIVE)

3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

 

Description

The DSLVDS1048 device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DSLVDS1048 accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DSLVDS1048 has a flow-through pinout for easy PCB layout.

The EN and EN* inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DSLVDS1048 and companion LVDS line driver (for example, DSLVDS1047) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.

Features

  • Designed for Signal Rates up to 400 Mbps
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to −100 mV Threshold Region
  • Operating Temperature Range: –40°C to +85°C
  • Meets or Exceeds ANSI/TIA/EIA-644 Standard
  • Available in TSSOP Package

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Parametrics Compare all products in Buffers, drivers/receivers & cross-points

 
Device type
Protocols
Number of Tx
Number of Rx
Input signal
Output signal
Signaling Rate (Mbps)
ESD HBM (kV)
Function
Operating temperature range (C)
Package Group
Package size: mm2:W x L (PKG)
DSLVDS1048 DS90LV048A
Receiver     Receiver    
LVDS     LVDS    
0     0    
4     4    
LVDS     LVDS    
TTL
LVTTL    
TTL
LVTTL    
400     400    
10     10    
Receiver     Receiver    
-40 to 85     -40 to 85    
TSSOP | 16     SOIC | 16
TSSOP | 16    
16TSSOP: 22 mm2: 4.4 x 5 (TSSOP | 16)     16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)
16TSSOP: 22 mm2: 4.4 x 5 (TSSOP | 16)