The LM97600 is a single/dual/quad, low power, high performance SiGe BiCMOS analog-to-digital converter that digitizes signals at sampling rates up to 5.0/2.5/1.25 GSPS. Consuming a typical 3.1 Watts at 5 GSPS from 1.2 and 2.5 Volt dual supplies, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable an excellent response of all dynamic parameters, producing a high 6.6 Effective Number Of Bits, (ENOB) with a 248 MHz input signal and a 5 GHz sample rate. The LM97600 achieves a 5 GSPS sampling rate by utilizing both the rising and falling edge of a 2.5 GHz input clock. Data encoding is 8 bits offset binary. Average output word size is 7.6 bits. The serialized data is 8b10b encoded providing DC balance and AC coupling capability. Decoding can be accomplished using existing FPGA serial I/O modules.
The converter typically consumes less than 65 mW in the Power Down Mode and is available in a 292 ball, thermally enhanced substrate BGA, and operates over the Industrial (-40°C ≤ TA ≤ +85°C) ambient temperature range.
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|Sample Rate (max) (SPS)|
|# Input Channels|
|Power Consumption (Typ) (mW)|
|Analog Input BW (MHz)|
|DNL (Max) (+/-LSB)|
|Digital Supply (Min) (V)|
|Digital Supply (Max) (V)|
|Analog Voltage AV/DD (Min) (V)|
|Analog Voltage AV/DD (Max) (V)|
|Operating Temperature Range (C)|
|Approx. Price (US$)|
|-40 to 85|
|249.12 | 1ku|
|Sample & Buy|
|Part #||Name||Product Family||Comments|
|LMH6518||900 MHz, Digitally Controlled, Variable Gain Amplifier||PGA/VGA - VARIABLE GAIN AMPLIFIER||Differential DVGA Ideal for DC Coupled Applications|
|LMH6554||2.8 GHz Ultra Linear Fully Differential Amplifier||OPERATIONAL AMPLIFIER - HIGH SPEED AMPLIFIER||Ultra Wideband Differential ADC Driver|
|LMX2531||High Performance Frequency Synthesizer System with Integrated VCO||Clock and Timing - RF PLLs and Synthesizers||Integrated PLL/VCO for Clock Generation|