LMK00308 3.1-GHz Differential Clock Buffer/Level Translator | TI.com

LMK00308 (ACTIVE)

3.1-GHz Differential Clock Buffer/Level Translator

3.1-GHz Differential Clock Buffer/Level Translator - LMK00308
 

Recommended alternative parts

  • CDCUN1208LP  - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   Low additive jitter, 1:8 Universal buffer with edge rate control
  • CDCLVP1208  - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   Low jitter, 1:8 LVPECL fan out buffer
  • CDCLVD1208  - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   Low jitter,1:8 LVDS fan out buffer

Description

The LMK00308 is a 3-GHz, 8-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution and level translation. The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of 4 differential outputs and one LVCMOS output. Both differential output banks can be independently configured as LVPECL, LVDS, or HCSL drivers, or disabled. The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The LMK00308 operates from a 3.3 V core supply and 3 independent 3.3 V/2.5 V output supplies.

The LMK00308 provides high performance, versatility, and power efficiency, making it ideal for replacing fixed-output buffer devices while increasing timing margin in the system.

Features

  • 3:1 Input Multiplexer:
    • Two Universal Inputs Operate up to 3.1 GHz and Accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or Single-Ended Clocks
    • One Crystal Input Accepts a 10 to 40 MHz Crystal or Single-Ended Clock
  • Two Banks with 4 Differential Outputs Each:
    • LVPECL, LVDS, HCSL, or Hi-Z (Selectable Per Bank)
    • LVPECL Additive Jitter with LMK03806 Clock Source at 156.25 MHz:
      • 20 fs RMS (10 kHz to 1 MHz)
      • 51 fs RMS (12 kHz to 20 MHz)
  • High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz
  • LVCMOS Output with Synchronous Enable Input
  • Pin-Controlled Configuration
  • VCC Core Supply: 3.3 V ± 5%
  • 3 Independent VCCO Output Supplies: 3.3 V/2.5 V ± 5%
  • Industrial Temperature Range: -40°C to +85°C
  • 40-lead WQFN (6 mm × 6 mm)

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Parametrics Compare all products in Universal (programmable)

 
Additive RMS Jitter (Typ) (fs)
Output Frequency (Max) (MHz)
Input Level
Number of Outputs
Output Level
VCC (V)
VCC Out (V)
Input Frequency (Max) (MHz)
Operating Temperature Range (C)
LMK00308 LMK00301 LMK00304 LMK00306
51     51     51     51    
3100     3100     3100     3100    
CML
HCSL
HSTL
LVCMOS
LVDS
LVPECL
LVTTL
SSTL
XTAL    
HCSL
LVDS
LVPECL    
LVPECL     CML
HCSL
HSTL
LVCMOS
LVDS
LVPECL
LVTTL
SSTL
XTAL    
9     11     5     7    
HCSL
LVCMOS
LVDS
LVPECL    
HCSL
LVDS
LVPECL    
LVPECL     HCSL
LVCMOS
LVDS
LVPECL    
3.3     3.3     3.3     3.3    
2.5
3.3    
3.3
2.5    
3.3
2.5    
2.5
3.3    
3100     3100     3100     3100    
-40 to 85     -40 to 85     -40 to 85     -40 to 85    

Featured tools and software

WEBENCH® Designer LMK00308

Frequency Number of Outputs
 MHz
Output Format