Ultra-Low Jitter Programmable Oscillator With Internal EEPROM - LMK61E0M

LMK61E0M (ACTIVE)

Ultra-Low Jitter Programmable Oscillator With Internal EEPROM

 

Description

The LMK61E0 family of ultra-low jitter PLLatinum™ programmable oscillators utilize fractional-N frequency synthesizers with integrated VCOs to generate commonly used reference clocks. The LMK61E0M supports 3.3-V LVCMOS outputs. The device features self startup from on-chip EEPROM to generate a factory programmed default output frequency, or the device registers and EEPROM settings are fully programmable in-system via I2C serial interface. The device provides fine and coarse frequency margining control via I2C serial interface, making it a digitally controlled oscillator (DCXO).

The PLL feedback divider can be updated to adjust the output frequency without spikes or glitches in steps of <1ppb using a PFD of 12.5MHz (R divider=4, doubler disabled) for compatibility with xDSL requirements, or in steps of <5.2ppb using a PFD of 100MHz (R divider=1, doubler enabled) for compatibility with broadcast video requirements. The frequency margining features also facilitate system design verification tests (DVT), such as standards compliance and system timing margin testing.

Features

  • Ultra-Low Noise, High Performance
    • Jitter: 500 fs RMS Typical fOUT > 50 MHz on LMK61E0M
  • LMK61E0M supports 3.3-V LVCMOS output up to 200 MHz
  • Total Frequency Tolerance of ±25 ppm
  • System Level Features
    • Glitch-less Frequency Margining: Up to ±1000 ppm from nominal
    • Internal EEPROM: User configurable startup settings
  • Other Features
    • Device Control: Fast Mode I2C up to 1000 kHz
    • 3.3-V Operating Voltage
    • Industrial Temperature Range (–40ºC to +85ºC)
    • 7-mm × 5-mm 8-Pin Package
  • Default Frequency 70.656 MHz

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Parametrics Compare all products in Clock Oscillators

 
Special Features
Output Frequency (Max) (MHz)
Output Level
Jitter (ps)
Stability (ppm)
VCC Core (V)
Rating
Operating Temperature Range (C)
Package Size: mm2:W x L (PKG)
Pin/Package
Package Group
LMK61E0M LMK60E2-150M LMK61E2 LMK61E2-100M LMK61E2-156M
Programmable with EEPROM    Fixed Frequency    Programmable with EEPROM    Fixed Frequency    Fixed Frequency   
200    150    1000    100    156.25   
LVCMOS    LVPECL    HCSL
LVDS
LVPECL   
LVPECL    LVPECL   
0.5    0.15    0.1    0.1    0.1   
25    50    50    50    50   
3.3    3.3    3.3    3.3    3.3   
Catalog    Catalog    Catalog    Catalog    Catalog   
-40 to 85    -40 to 85    -40 to 85    -40 to 85    -40 to 85   
See datasheet (QFM)    See datasheet (QFM)    See datasheet (QFM)    See datasheet (QFM)    See datasheet (QFM)   
8QFM    6QFM    8QFM    6QFM    6QFM   
QFM    QFM    QFM    QFM    QFM