The LMP7717 (single) and the LMP7718 (dual) low noise, CMOS input operational amplifiers offer a low input voltage noise density of 5.8 nV/√Hz while consuming only 1.15 mA (LMP7717) of quiescent current. The LMP7717/LMP7718 are stable at a gain of 10 and have a gain bandwidth (GBW) product of 88 MHz. The LMP7717/LMP7718 have a supply voltage range of 1.8V to 5.5V and can operate from a single supply. The LMP7717/LMP7718 each feature a rail-to-rail output stage. Both amplifiers are part of the LMP precision amplifier family and are ideal for a variety of instrumentation applications.
The LMP7717 family provides optimal performance in low voltage and low noise systems. A CMOS input stage, with typical input bias currents in the range of a few femto-Amperes, and an input common mode voltage range, which includes ground, make the LMP7717/LMP7718 ideal for low power sensor applications where high speeds are needed.
The LMP7717/LMP7718 are manufactured using TI’s advanced VIP50 process. The LMP7717 is offered in either a 5-Pin SOT-23 or an 8-Pin SOIC package. The LMP7718 is offered in either the 8-Pin SOIC or the 8-Pin VSSOP.
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|Number of Channels (#)|
|Total Supply Voltage (Min) (+5V=5, +/-5V=10)|
|Total Supply Voltage (Max) (+5V=5, +/-5V=10)|
|BW @ Acl (MHz)|
|Acl, min spec gain (V/V)|
|Slew Rate (Typ) (V/us)|
|Vn at Flatband (Typ) (nV/rtHz)|
|Iq per channel (Typ) (mA)|
|Vos (Offset Voltage @ 25C) (Max) (mV)|
|Operating Temperature Range (C)|
|Package Size: mm2:W x L (PKG)|
|CMRR (Typ) (dB)|
|Input Bias Current (Max) (pA)|
|Offset Drift (Typ) (uV/C)|
|GBW (Typ) (MHz)|
|Output Current (Typ) (mA)|
| CMOS |
| In to V- |
|-40 to 125|
| SOIC |
| 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) |
8SOIC: 29 mm2: 6 x 4.9(SOIC)