SM320F2812 (ACTIVE)

Military Digital Signal Processor


The SM320F2812 device, member of the C28x™ DSP generation, is a highly integrated, high-performance solution for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document, SM320F2812 is abbreviated as F2812.


  • High-Performance Static CMOS Technology
    • 150 MHz (6.67-ns Cycle Time)
    • Low-Power (1.8-V Core at 135 MHz, 1.9-V Core at 150 MHz, 3.3-V I/O) Design
    • 3.3-V Flash Voltage
  • JTAG Boundary Scan Support
  • High-Performance 32-Bit CPU (TMS320C28x)
    • 16 x 16 and 32 x 32 MAC Operations
    • 16 x 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program Address Reach
    • 4M Linear Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • Flash Devices: Up to 128K x 16 Flash (Four 8K x 16 and Six 16K x 16 Sectors)
    • ROM Devices: Up to 128K x 16 ROM
    • 1K x 16 OTP ROM
    • L0 and L1: 2 Blocks of 4K x 16 Each Single-Access RAM (SARAM)
    • H0: 1 Block of 8K x 16 SARAM
    • M0 and M1: 2 Blocks of 1K x 16 Each SARAM
  • Boot ROM (4K x 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • 128-Bit Security Key/Lock
    • Protects Flash/ROM/OTP and L0/L1 SARAM
    • Prevents Firmware Reverse Engineering
  • Three 32-Bit CPU-Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Enhanced Controller Area Network (eCAN)
    • Multichannel Buffered Serial Port (McBSP) With SPI Mode
  • 12-Bit ADC, 16 Channels
    • 2 x 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Supports TMS320C24x™/240x Instructions
    • Code Composer Studio™ IDE
    • DSP/BIOS™
    • JTAG Scan Controllers [Texas Instruments (TI) or Third-Party]
    • Evaluation Modules
    • Broad Third-Party Digital Motor Control Support
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • Package Options
    • 172-Pin Ceramic Quad Flatpack (HFG)
  • Temperature Options:
    • M: –55°C to 125°C (HFG)

TMS320C24x, Code Composer Studio, DSP/BIOS, and MicroStar BGA are trademarks of Texas Instruments.
IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
TMS320C28x is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.

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Other qualified versions of SM320F2812

Version Part Number Definition
Catalog TMS320F2812 TI's standard catalog product
Enhanced Product SM320F2812-EP Supports Defense, Aerospace and Medical Applications
High-Temperature SM320F2812-HT High-Temperature product for harsh environments
Military SMJ320F2812 QML certified for Military and Defense Applications

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Parametrics Compare all products in Fixed-point F280x/1x

Total Processing (MIPS)
Frequency (MHz)
Processing Accelerators
Frequency per CLA (MHz)
Flash (KB)
PWM (Ch)
High Resolution PWM(Ch)
PWM Technology Type
Other Actuation Features
Analog to Digital Converter (ADC)
ADC (Ch)
Other Sensing Features
Other Connectivity Features
Additional Features
SM320F2812 SMJ320F2812
C28x     C28x    
150     150    
150     150    
N/A     N/A    
0     0    
256     256    
36     36    
0     0    
16     16    
0     0    
EV     EV    
N/A     N/A    
ADC12: 2-S/H, 12.5-MSPS     ADC12: 2-S/H, 12.5-MSPS    
16     16    
6     6    
2     2    
N/A     N/A    
0     0    
1     1    
2     2    
External Interface (XINTF)
Single Zone Code Security
32-bit CPU Timers
Watchdog Timer
2-pin Oscillator
Military Qualified    
External Interface (XINTF)
Single Zone Code Security
32-bit CPU Timers
Watchdog Timer
2-pin Oscillator
Military Qualified    
56     56    
172CFP     172CFP    
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