SN74HC03 Quadruple 2-Input Positive-NAND Gates With Open-Drain Outputs | TI.com

SN74HC03 (ACTIVE)

Quadruple 2-Input Positive-NAND Gates With Open-Drain Outputs

Quadruple 2-Input Positive-NAND Gates With Open-Drain Outputs - SN74HC03
Datasheet
 

Description

The ’HC03 devices contain four independent 2-input NAND gates. They perform the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic. The open-drain outputs require pullup resistors to perform correctly. They may be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.

Features

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs Can Drive Up to 10 LSTTL Loads
  • Low Power Consumption, 20-µA Max ICC
  • Typical tpd = 8 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max

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Parametrics Compare all products in NAND gate

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Inputs per channel
ICC @ Nom Voltage (Max) (mA)
IOL (Max) (mA)
IOH (Max) (mA)
Input Type
Output Type
Features
Rating
Data Rate (Max) (Mbps)
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
SN74HC03 SN54HC03
HC     HC    
2     2    
6     6    
4      
2      
0.02     0.02    
5.2     5.2    
0     -5.2    
Standard CMOS     CMOS    
Open-Drain     CMOS    
High Speed (tpd 10-50ns)      
Catalog     Military    
28      
-40 to 85     -55 to 125    
PDIP | 14
SOIC | 14
SO | 14
TSSOP | 14    
CDIP | 14
LCCC | 20    
See datasheet (PDIP)
14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)    
See datasheet (CDIP)
20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20)