SN74LVC1G08 Single 2-Input Positive-AND Gate | TI.com

SN74LVC1G08 (ACTIVE)

Single 2-Input Positive-AND Gate

Single 2-Input Positive-AND Gate - SN74LVC1G08
Datasheet
 

Description

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G08 device performs the Boolean function or in positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G08 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.

Features

  • Available in the Ultra Small 0.64-mm2
    Package (DPW) With 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.6 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Parametrics Compare all products in AND gate

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Inputs per channel
ICC @ nom voltage (Max) (mA)
IOL (Max) (mA)
IOH (Max) (mA)
Input type
Output type
Features
Data rate (Max) (Mbps)
Rating
Operating temperature range (C)
Package Group
Package size: mm2:W x L (PKG)
SN74LVC1G08 SN74LVC1G00 SN74LVC1G02 SN74LVC1G08-EP SN74LVC1G08-Q1 SN74LVC1G32 SN74LVC1G32-EP SN74LVC1G32-Q1
LVC     LVC     LVC     LVC     LVC     LVC     LVC     LVC    
1.65     1.65     1.65     1.65     1.65     1.65     1.65     1.65    
5.5     5.5     5.5     5.5     5.5     5.5     5.5     5.5    
1     1     1     1     1     1     1     1    
2     1     2     2     2     2     2     2    
0.01     0.01     0.01     0.01     0.01     0.01     0.01     0.025    
32     32     32     32     32     32     32     32    
-32     -32     -32     -32     -32     -32     -32     -32    
Standard CMOS     Standard CMOS     Standard CMOS     Standard CMOS     Standard CMOS     Standard CMOS     Standard CMOS     Standard CMOS    
Push-Pull     Push-Pull     Push-Pull     Push-Pull     Push-Pull     Push-Pull     Push-Pull     Push-Pull    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Very High Speed (tpd 5-10ns)    
100     100     100     100     100     100     100     100    
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