TL074B Low-Noise JFET-Input Operational Amplifier | TI.com

TL074B (ACTIVE)

Low-Noise JFET-Input Operational Amplifier

 

Description

The TL07xx JFET-input operational amplifiers incorporate well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low-input bias and offset currents, and low offset-voltage temperature coefficient. The low harmonic distortion and low noise make the TL07x series ideally suited for high-fidelity and audio pre-amplifier applications. The TL071 device has offset pins to support external input offset correction.

Features

  • Low Power Consumption
  • Wide Common-Mode and Differential Voltage Ranges
  • Low Input Bias and Offset Currents
  • Output Short-Circuit Protection
  • Low Total Harmonic Distortion: 0.003% (Typical)
  • Low Noise
    Vn = 18 nV/√Hz (Typical) at f = 1 kHz
  • High-Input Impedance: JFET Input Stage
  • Internal Frequency Compensation
  • Latch-Up-Free Operation
  • High Slew Rate: 13 V/µs (Typical)
  • Common-Mode Input Voltage Range
    Includes VCC+

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Parametrics Compare all products in General-purpose op amps

 
Number of channels (#)
Total Supply Voltage (Min) (+5V=5, +/-5V=10)
Total Supply Voltage (Max) (+5V=5, +/-5V=10)
GBW (Typ) (MHz)
Slew Rate (Typ) (V/us)
Rail-to-rail
Vos (offset voltage @ 25 C) (Max) (mV)
Iq per channel (Typ) (mA)
Vn at 1 kHz (Typ) (nV/rtHz)
Rating
Operating temperature range (C)
Package Group
Package size: mm2:W x L (PKG)
Offset drift (Typ) (uV/C)
Features
Input bias current (Max) (pA)
CMRR (Typ) (dB)
Output current (Typ) (mA)
Architecture
TL074B TL071 TL072 TL074 TL074A
4     1     2     4     4    
7     7     7     7     7    
36     36     36     36     36    
3     3     3     3     3    
13     13     13     13     13    
In to V+     In to V+     In to V+     In to V+     In to V+    
3     6     6     6     6    
1.4     1.4     1.4     1.4     1.4    
18     18     18     18     18    
Catalog     Catalog     Catalog     Catalog     Catalog    
0 to 70     -40 to 85
0 to 70    
-40 to 85
0 to 70    
-40 to 85
0 to 70    
0 to 70    
PDIP | 14
SOIC | 14    
PDIP | 8
SOIC | 8
SO | 8    
PDIP | 8
SOIC | 8
SO | 8
TSSOP | 8    
PDIP | 14
SOIC | 14
SO | 14
SSOP | 14
TSSOP | 14    
PDIP | 14
SOIC | 14
SO | 14    
See datasheet (PDIP)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)    
See datasheet (PDIP)
8SO: 48 mm2: 7.8 x 6.2 (SO | 8)
8SOIC: 29 mm2: 6 x 4.9 (SOIC | 8)    
See datasheet (PDIP)
8SO: 48 mm2: 7.8 x 6.2 (SO | 8)
8SOIC: 29 mm2: 6 x 4.9 (SOIC | 8)
8TSSOP: 19 mm2: 6.4 x 3 (TSSOP | 8)    
See datasheet (PDIP)
14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14SSOP: 48 mm2: 7.8 x 6.2 (SSOP | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)    
See datasheet (PDIP)
14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)    
18     18     18     18     18    
Standard Amps     Standard Amps     Standard Amps     Standard Amps     Standard Amps    
200     200     200     200     200    
100     100     100     100     100    
10     10     10     10     10    
FET     FET     FET     FET     FET    

Design tool

WEBENCH® Designer TL074B

Amplifier Topology
 Non-inverting
 Inverting
Desired Power Supply Voltage
Positive Supply (Vcc):  V
Negative Supply (Vee):  V
Allowed Power Supply(Vcc-Vee) = 10.0 to 36.0 V
Desired Input and Output Requirements
  Min Max
Vin  V  V
Vout  V  V
Minimum Temperature = 0.0 °C
Maximum Temperature = 70.0 °C