Product details

Function General-purpose timer Iq (typ) (mA) 0.17 Rating Automotive Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 15 Supply voltage (min) (V) 2 TI functional safety category Functional Safety-Capable
Function General-purpose timer Iq (typ) (mA) 0.17 Rating Automotive Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 15 Supply voltage (min) (V) 2 TI functional safety category Functional Safety-Capable
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Qualified for Automotive Applications
  • Very Low Power Consumption
    • 1 mW (Typical) at VDD = 5 V
  • Capable of Operation in Astable Mode
  • CMOS Output Capable of Swinging Rail to Rail
  • High-Output-Current Capability
    • Sink 100 mA (Typical)
    • Source 10 mA (Typical)
  • Output Fully Compatible With CMOS, TTL, and
    MOS
  • Low Supply Current Reduces Spikes During
    Output Transitions
  • Single-Supply Operation From 2 V to 15 V
  • Functionally Interchangeable With the NE555;
    Has Same Pinout
  • Qualified for Automotive Applications
  • Very Low Power Consumption
    • 1 mW (Typical) at VDD = 5 V
  • Capable of Operation in Astable Mode
  • CMOS Output Capable of Swinging Rail to Rail
  • High-Output-Current Capability
    • Sink 100 mA (Typical)
    • Source 10 mA (Typical)
  • Output Fully Compatible With CMOS, TTL, and
    MOS
  • Low Supply Current Reduces Spikes During
    Output Transitions
  • Single-Supply Operation From 2 V to 15 V
  • Functionally Interchangeable With the NE555;
    Has Same Pinout

The TLC555-Q1 is a monolithic timing circuit fabricated using the TI LinCMOS™ process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power-supply voltage.

Like the NE555, the TLC555-Q1 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT).

When the trigger input (TRIG) falling below the trigger level sets the flip-flop, and the output goes high. Having TRIG above the trigger level and the threshold input (THRES) above the threshold level resets the flip-flop, and the output is low. The reset input (RESET) can override all other inputs, and a possible use is to initiate a new timing cycle. RESET going low resets the flip-flop, and the output is low. Whenever the output is low, a low-impedance path exists between the discharge terminal (DISCH) and GND. Tie all unused inputs to an appropriate logic level to prevent false triggering.

The advantage of the TLC555-Q1 is that it exhibits greatly reduced supply-current spikes during output transitions. Although the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the main reason the TLC555-Q1 is able to have low current spikes is due to its edge rates. This minimizes the need for the large decoupling capacitors required by the NE555.

The TLC555-Q1 is characterized for operation over the full automotive temperature range of –40°C to 125°C.

The TLC555-Q1 is a monolithic timing circuit fabricated using the TI LinCMOS™ process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power-supply voltage.

Like the NE555, the TLC555-Q1 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT).

When the trigger input (TRIG) falling below the trigger level sets the flip-flop, and the output goes high. Having TRIG above the trigger level and the threshold input (THRES) above the threshold level resets the flip-flop, and the output is low. The reset input (RESET) can override all other inputs, and a possible use is to initiate a new timing cycle. RESET going low resets the flip-flop, and the output is low. Whenever the output is low, a low-impedance path exists between the discharge terminal (DISCH) and GND. Tie all unused inputs to an appropriate logic level to prevent false triggering.

The advantage of the TLC555-Q1 is that it exhibits greatly reduced supply-current spikes during output transitions. Although the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the main reason the TLC555-Q1 is able to have low current spikes is due to its edge rates. This minimizes the need for the large decoupling capacitors required by the NE555.

The TLC555-Q1 is characterized for operation over the full automotive temperature range of –40°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet TLC555-Q1 LinCMOS™ TIMER datasheet (Rev. B) PDF | HTML 28 Aug 2015
Functional safety information TLC555-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA (Rev. A) PDF | HTML 13 Mar 2023
Technical article Power Tips: Multiply your output voltage PDF | HTML 20 Jul 2016
Design guide EMC Compatible Automotive LED Rear Lamp Sequential-Turn Animation Design Guide 02 Jun 2016
Application note TLC555-Q1 Used as a Positive and Negative Charge Pump 25 May 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

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Test report: PDF
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