Graphics System Processor - TMS34010


Graphics System Processor



The TMS34010 Graphics System Processor (GSP) is an advanced high-performance CMOS 32-bit microprocessor optimized for graphics display systems. With a built-in instruction cache, the ability to simultaneously access memory and registers, and an instruction set designed specifically for raster graphics operation, the TMS34010 provides user-programmable control of the CRT interface as well as the memory interface (both standard DRAM and multiport video RAM). The 1-gigabit address space is completely bit-addressable on bit boundaries using variable width data fields (1 to 32 bits). Additional graphics addressing modes support 1, 2, 4, 8, and 16-bit wide pixels. The TMS34010 is exceptionally well-supported by graphics software interface standards such as TIGA, MS-Windows, the X Window System, DGIS, and CGI, as well as a full line of hardware and software support tools. Current support is highlighted in the TMS34010 Third Party Reference Guide (literature number SPVB066C).


  • Instruction Cycle Time:
    - 132 ns . . . (TMS34010-60)
    - 160 ns . . . (TMS34010-50)
    - 200 ns . . . (TMS34010-40)
  • Fully Programmable 32-Bit General-Purpose Processor with 128-Megabyte Address Range
  • Pixel Processing, XY Addressing, and Window Checking Built into the Instruction Set
  • Programmable 1, 2, 4, 8, or 16-Bit Pixel Size with 16 Boolean and 6 Arithmetic Pixel Processing Options (Raster-Ops)
  • 30 General Purpose 32-bit Registers and 32-bit Stack Pointer
  • 256-Byte LRU On-Chip Instruction Cache
  • Direct Interfacing to Both Conventional DRAM and Multiport Video RAM
  • Dedicated 8/16-Bit Host Processor Interface and HOLD/HLDA Interface
  • Programmable CRT Control (HSYNC\, VSYNC\, BLANK\)
  • High-Level Language Support
  • Full Line of Hardware and Software Development Tools Including a "C" Compiler
  • 68-Leaded Packaging (PLCC)
  • 5-Volt CMOS Technology

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