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TPD2S017

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2 channel 5.5-V, 1-pF, ±11kV ESD protection diode with low clamping and EMI filtering

Product details

Package name SOT-23 Vrwm (V) 5.5 Bi-/uni-directional Uni-Directional Number of channels 2 IO capacitance (typ) (pF) 1 Clamping voltage (V) 14 Breakdown voltage (min) (V) 11
Package name SOT-23 Vrwm (V) 5.5 Bi-/uni-directional Uni-Directional Number of channels 2 IO capacitance (typ) (pF) 1 Clamping voltage (V) 14 Breakdown voltage (min) (V) 11
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8
  • Ultra-low clamping voltage ensures the protection of ultra-low voltage core chipset during ESD events
  • IEC 61000-4-2 ESD protection
  • Matching of series resistor (R = 1 Ω) of ±8 mΩ (typical)
  • Differential channel input capacitance matching of 0.02 pF (typical)
  • High-speed data rate and EMI filter action at high frequencies (–3 dB bandwidth, ≉3 GHz)
  • Available in 6-Pin small-outline transistor [SOT-23 (DBV)] package
  • Easy straight-through routing packages
  • Ultra-low clamping voltage ensures the protection of ultra-low voltage core chipset during ESD events
  • IEC 61000-4-2 ESD protection
  • Matching of series resistor (R = 1 Ω) of ±8 mΩ (typical)
  • Differential channel input capacitance matching of 0.02 pF (typical)
  • High-speed data rate and EMI filter action at high frequencies (–3 dB bandwidth, ≉3 GHz)
  • Available in 6-Pin small-outline transistor [SOT-23 (DBV)] package
  • Easy straight-through routing packages

The TPD2S017 is a two channel electrostatic discharge (ESD) protection device. This protection product offers two-stage ESD transient voltage suppression (TVS) diodes in each line with a typically 1-Ω series resistor isolation. This architecture allows the device to clamp at a very low voltage during system level ESD strikes.

The TPD2S017 conforms to the IEC61000-4-2 ESD protection standard. Due to the series resistor component, the TPD2S017 provides a controlled filter roll-off for even greater spurious EMI suppression and signal integrity. The monolithic silicon technology allows good matching of the component values, including the clamp capacitances and the series resistors between the differential signal pairs. The tight matching of the line capacitance and series resistors ensures that the differential signal distortion due to added ESD clamp remains minimal, and it also allows the part to operate at high-speed differential data rate (in excess of 1.5 Gbps). The DBV package offers a flow-through pin mapping for ease of board layout.

Typical applications of this ESD protection device are circuit protection for USB data lines, IEEE 1394 Interfaces, LVDS, MDDI/MIPI and HS signals.

The TPD2S017 is a two channel electrostatic discharge (ESD) protection device. This protection product offers two-stage ESD transient voltage suppression (TVS) diodes in each line with a typically 1-Ω series resistor isolation. This architecture allows the device to clamp at a very low voltage during system level ESD strikes.

The TPD2S017 conforms to the IEC61000-4-2 ESD protection standard. Due to the series resistor component, the TPD2S017 provides a controlled filter roll-off for even greater spurious EMI suppression and signal integrity. The monolithic silicon technology allows good matching of the component values, including the clamp capacitances and the series resistors between the differential signal pairs. The tight matching of the line capacitance and series resistors ensures that the differential signal distortion due to added ESD clamp remains minimal, and it also allows the part to operate at high-speed differential data rate (in excess of 1.5 Gbps). The DBV package offers a flow-through pin mapping for ease of board layout.

Typical applications of this ESD protection device are circuit protection for USB data lines, IEEE 1394 Interfaces, LVDS, MDDI/MIPI and HS signals.

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Technical documentation

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Type Title Date
* Data sheet TPD2S017 2-Channel Ultra-Low Clamp Voltage ESD Solution With Series-Resistor Isolation datasheet (Rev. C) PDF | HTML 03 Jan 2023
Application note ESD and Surge Protection for USB Interfaces (Rev. B) PDF | HTML 11 Jan 2024
User guide Reading and Understanding an ESD Protection Data Sheet (Rev. A) PDF | HTML 19 Sep 2023
Application note ESD Packaging and Layout Guide (Rev. B) PDF | HTML 18 Aug 2022
Application note ESD Protection Layout Guide (Rev. A) PDF | HTML 07 Apr 2022
User guide Generic ESD Evaluation Module User's Guide (Rev. A) PDF | HTML 27 Sep 2021
White paper Designing USB for short-to-battery tolerance in automotive environments 10 Feb 2016
Analog Design Journal Design Considerations for System-Level ESD Circuit Protection 25 Sep 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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User guide: PDF | HTML
Not available on TI.com
Simulation model

TPD2S017 IBIS Model

SLLM415.ZIP (2 KB) - IBIS Model
Simulation tool

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Simulation tool

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Reference designs

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Design guide: PDF
Schematic: PDF
Package Pins Download
SOT-23 (DBV) 6 View options

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