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AC/DC & DC/DC converters (integrated FET)

TPS54824

ACTIVE

4.5-V to 17-V, 8-A synchronous SWIFT™ buck converter in HotRod™ QFN

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Data sheet

TPS54824

ACTIVE
Data sheet Order now

Product details

Iout (max) (A) 8 Vin (min) (V) 4.5 Vin (max) (V) 17 Type Converter Switching frequency (min) (kHz) 200 Switching frequency (max) (kHz) 1600
Iout (max) (A) 8 Vin (min) (V) 4.5 Vin (max) (V) 17 Type Converter Switching frequency (min) (kHz) 200 Switching frequency (max) (kHz) 1600
VQFN-HR (RNV) 18 12.25 mm² 3.5 x 3.5
  • Small 3.5-mm × 3.5-mm HotRod™ QFN package
  • Integrated 14.1-mΩ and 6.1-mΩ MOSFETs
  • Peak current mode control with fast transient response
  • 200-kHz to 1.6-MHz fixed switching frequency
  • Synchronizes to external clock
  • 0.6-V voltage reference ±0.85% over temperature
  • 0.6-V to 12-V output voltage range
  • Hiccup Current Limit
  • Safe start-up into pre-biased output voltage
  • Adjustable soft start and power sequencing
  • Adjustable input undervoltage lockout
  • 3-µA shutdown current
  • Power good output monitor for undervoltage and overvoltage
  • Output overvoltage protection
  • Non-latch thermal shutdown protection
  • –40°C to 150°C operating junction temperature
  • Small 3.5-mm × 3.5-mm HotRod™ QFN package
  • Integrated 14.1-mΩ and 6.1-mΩ MOSFETs
  • Peak current mode control with fast transient response
  • 200-kHz to 1.6-MHz fixed switching frequency
  • Synchronizes to external clock
  • 0.6-V voltage reference ±0.85% over temperature
  • 0.6-V to 12-V output voltage range
  • Hiccup Current Limit
  • Safe start-up into pre-biased output voltage
  • Adjustable soft start and power sequencing
  • Adjustable input undervoltage lockout
  • 3-µA shutdown current
  • Power good output monitor for undervoltage and overvoltage
  • Output overvoltage protection
  • Non-latch thermal shutdown protection
  • –40°C to 150°C operating junction temperature

The TPS54824 is a full-featured 17-V (19-V maximum), 8-A synchronous step-down DC/DC converter in a 3.5 mm × 3.5 mm HotRod™ QFN package.

The device is optimized for small solution size through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through peak current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor footprint.

The peak current mode control simplifies the loop compensation and provides fast transient response. Cycle-by-cycle peak current limiting on the high-side and low-side sourcing current limit protects the device in overload situations. Hiccup limits MOSFET power dissipation if a short circuit or over loading fault persists.

A power good supervisor circuit monitors the regulator output. The PGOOD pin is an open-drain output and goes high impedance when the output voltage is in regulation. An internal deglitch time prevents the PGOOD pin from pulling low unless a fault has occurred.

A dedicated EN pin can be used to control the regulator on/off and adjust the input undervoltage lockout. The output voltage start-up ramp is controlled by the SS/TRK pin, which allows operation as either a standalone power supply or in tracking situations.

The TPS54824 is a full-featured 17-V (19-V maximum), 8-A synchronous step-down DC/DC converter in a 3.5 mm × 3.5 mm HotRod™ QFN package.

The device is optimized for small solution size through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through peak current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor footprint.

The peak current mode control simplifies the loop compensation and provides fast transient response. Cycle-by-cycle peak current limiting on the high-side and low-side sourcing current limit protects the device in overload situations. Hiccup limits MOSFET power dissipation if a short circuit or over loading fault persists.

A power good supervisor circuit monitors the regulator output. The PGOOD pin is an open-drain output and goes high impedance when the output voltage is in regulation. An internal deglitch time prevents the PGOOD pin from pulling low unless a fault has occurred.

A dedicated EN pin can be used to control the regulator on/off and adjust the input undervoltage lockout. The output voltage start-up ramp is controlled by the SS/TRK pin, which allows operation as either a standalone power supply or in tracking situations.
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Technical documentation

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Type Title Date
* Data sheet TPS54824 4.5-V to 17-V (19-V Maximum) Input, 8-A Synchronous SWIFT™ Step-Down Converter datasheet (Rev. B) PDF | HTML 17 Oct 2019
Application note Peak Current Mode Converter Secondary Stage Filter Design for Low Ripple Power – Part I: Filter Design for Out PDF | HTML 27 Feb 2024
Application note Peak Current Mode Converter Secondary Stage Filter Design for Low Ripple Power – Part II: Hybrid Sense Network PDF | HTML 27 Feb 2024
Application note Collection of DC/DC Buck Regulator Technical Documentation (Rev. A) PDF | HTML 28 Nov 2022
EVM User's guide TPS54824 SWIFT™ Step-Down Converter Evaluation Module User's Guide (Rev. B) PDF | HTML 19 Aug 2021
Application note DC/DC Converter Solutions for Hardware Accelerators in Data Center Applications (Rev. A) PDF | HTML 04 May 2021
Application note Non-Isolated Point-of-Load Solutions for Tiger Lake in PC Applications (Rev. B) PDF | HTML 29 Apr 2021
Selection guide Buck Converter Quick Reference Guide (Rev. B) 08 Apr 2021
Application note Point-of-Load Solutions for Data Center App Implementing VR13.HC Vccin Spec (Rev. A) PDF | HTML 08 Jan 2020
Application note Understanding Flip Chip QFN (HotRod) and Standard QFN Performance Differences 02 Jul 2019
Application note Minimizing Output Ripple During Startup (Rev. A) 20 May 2019
Application note DC/DC Point-of-load Power Solutions for Wired Networking Switch Systems 11 Dec 2018
Application note Optimizing Layout of the TPS54824 HotRod™ Package for Thermal Performance 16 Nov 2018
Application note Solve Point-of-Load Power Design Challenges: Single Board Computer Applications 24 Aug 2018
Application note Create an Inverting Power Supply Using a Synchronous Step-Down Regulator (Rev. B) 25 Jun 2018
More literature Common Mistakes in DC/DC Converters and How to Fix Them 14 Feb 2018
White paper Measuring various types of low-frequency noise in DC/DC switching converters 01 Feb 2018
Analog Design Journal Reducing noise on the output of a switching regulator 04 Jan 2018
Application note Minimizing Output Ripple During Startup 22 Jun 2017
Application note HotRod QFN Application Note 09 Apr 2014
Application note Ultra Small 5A, Adjustable Output Reference design using TPS54620 21 May 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS54824EVM-779 — TPS54824 Synchronous Step-Down Converter Evaluation Module

The TPS54824EVM-779 is a 8 A synchronous converter evaluation module (EVM).  The EVM generates a 1.8 V output voltage from a nominal 12 V input.  The input voltage range is 4.5 V to 17 V.  The circuit is set up for operation at 700 kHz.
User guide: PDF | HTML
Not available on TI.com
Simulation model

TPS54824 PSpice Average Model (Rev. C)

SLVMBY0C.ZIP (57 KB) - PSpice Model
Download
Simulation model

TPS54824 PSpice Transient Model (Rev. B)

SLVMBU2B.ZIP (236 KB) - PSpice Model
Download
Simulation model

TPS54824 TINA-TI Average Reference Design (Rev. C)

SLVMBZ3C.TSC (153 KB) - TINA-TI Reference Design
Download
Simulation model

TPS54824 TINA-TI Average Spice Model (Rev. C)

SLVMBZ4C.ZIP (9 KB) - TINA-TI Spice Model
Download
Reference designs

TIDA-01466 — Low-Voltage, Low-Noise Power-Supply Reference Design for Ultrasound Front End

This reference design is a power supply optimized specifically for providing power to eight 16-channel receive AFE ICs for ultrasound imaging systems. This design reduces part count while maximizing efficiency by using single-chip DC-DC converter + LDO combo regulators to set the LDO input just (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01510 — Two-Sided Layout Reference Design to Increase Power Density With DC/DC Converters

This reference design demonstrates the correct way to design a two-sided DC/DC layout in an effort to achieve higher power-supply density. The design guide highlights common mistakes and how to avoid them, along with test results showing that proper implemenation of the TPS54824 device in a (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
VQFN-HR (RNV) 18 View options
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