12-Channel, 1:2 MUX/DEMUX Switch for DDR3 Applications - TS3DDR3812

TS3DDR3812 (ACTIVE)

12-Channel, 1:2 MUX/DEMUX Switch for DDR3 Applications

 

Recommended alternative parts

  • TS3DDR4000  -  The same functionality as the TS3DDR3812, but with higher bandwidth for DDR3 and DDR4 applications.

Description

The TS3DDR3812 is a 12-channel, 1:2 multiplexer/demultiplexer switch designed for DDR3 applications. It operates from a 3 to 3.6 V supply and offers low and flat ON-state resistance as well as low I/O capacitance which allow it to achieve a typical bandwidth of 1.675 GHz.

Channels A0 through A11 are divided into two banks of six bits and are independently controlled via two digital inputs called SEL1 and SEL2. These select inputs control the switch position of each 6-bit DDR3 source and allow them to be routed to one of two end-points. Alternatively, the switch can be used to connect a single endpoint to one of two 6-bit DDR3 sources. For switching 12-bit DDR3 sources, simply connect SEL1 and SEL2 together externally and control all 12 channels with a single GPIO input. An EN input allows the entire chip to be placed into a high-impedance (Hi-Z) state while not in use.

These characteristics make the TS3DDR3812 an excellent choice for use in memory, analog/digital video, LAN, and other high-speed signal switching applications.

Features

  • Compatible with DDR3 SDRAM Standard (JESD79-3D)
  • Wide Bandwidth of 1.675 GHz
  • Low Propagation Delay (tpd = 40 ps Typ)
  • Low Bit-to-Bit Skew (tsk(o) = 6 ps Typ)
  • Low and Flat ON-State Resistance
    (rON = 8 Ω Typ)
  • Low Input/Output Capacitance
    (CON = 5.6 pF Typ)
  • Low Crosstalk (XTALK = –43 dB,
    Typ at 250 MHz)
  • VCC Operating Range from 3 V to 3.6 V
  • Rail-to-Rail Switching on Data I/O Ports
    (0 to VCC)
  • Separate Switch Control Logic for Upper and Lower 6-Channels
  • Dedicated Enable Logic Supports Hi-Z Mode
  • IOFF Protection Prevents Current Leakage in Powered Down State (VCC = 0 V)
  • ESD Performance Tested Per JESD22
    • 2000 V Human Body Model
      (A114B, Class II)
    • 1000 V Charged Device Model (C101)
  • 42-pin RUA Package (9 × 3.5 mm, 0.5 mm Pitch)

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Parametrics Compare all products in Protocol Specific Switches/Muxes

 
Protocols
Configuration
Number of Channels (#)
VCC (Min) (V)
VCC (Max) (V)
Ron (Typ) (Ohms)
Input/Ouput Voltage (Min) (V)
Input/Ouput Voltage (Max) (V)
ICC (Max) (uA)
Bandwidth (MHz)
ESD HBM (Typ) (kV)
Additional Features
Operating Temperature Range (C)
Package Size: mm2:W x L (PKG)
Package Group
Crosstalk (dB)
ESD Charged Device Model (kV)
ICC (Typ) (uA)
Input/Output Continuous Current (Max) (mA)
Input/Output OFF-state Capacitance (Typ) (pF)
Input/Output ON-state Capacitance (Typ) (pF)
OFF-state leakage current (Max) (µA)
Propagation Delay (ns)
Ron (Max) (Ohms)
Ron Channel Match (Max) (Ω)
RON Flatness (Typ) (Ohms)
Turn off Time (Disable) (Max) (ns)
Turn on Time (Enable) (Max) (ns)
VIH (Min) (V)
VIL (Max) (V)
TS3DDR3812 TS2DDR2811
DDR3    DDR2   
2:1 SPDT    1:1 SPST   
12    8   
3    3   
3.6    3.6   
8    4   
0    0   
3.6    3.6   
400    500   
1675    1100   
2    2   
Powered off protection     
-40 to 85    -40 to 85   
42WQFN: 32 mm2: 3.5 x 9(WQFN)    20BGA MICROSTAR JUNIOR: 8 mm2: 3 x 2.5(BGA MICROSTAR JUNIOR)   
WQFN    BGA MICROSTAR JUNIOR   
-71     
1    1   
  250   
128    128   
5.6    2.5   
2    4   
1     
0.04    0.04   
12    6   
1    1   
1.5    0.5   
5    9   
7    15   
2    2   
0.8    0.8   

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