Product details

Technology family TXS Applications I2C, MDIO, SMBus Bits (#) 2 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 5.5 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0.282 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
Technology family TXS Applications I2C, MDIO, SMBus Bits (#) 2 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 5.5 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0.282 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C5
  • ESD Protection per JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 750-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 750-V Charged-Device Model (C101)
  • No Direction-Control Signal Required
  • Maximum Data Rates
    • 24 Mbps Maximum (Push Pull)
    • 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoFree™ Package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • No Power-Supply Sequencing Required—VCCA or VCCB can be Ramped First
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C5
  • ESD Protection per JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 750-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 750-V Charged-Device Model (C101)
  • No Direction-Control Signal Required
  • Maximum Data Rates
    • 24 Mbps Maximum (Push Pull)
    • 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoFree™ Package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • No Power-Supply Sequencing Required—VCCA or VCCB can be Ramped First

The TXS0102-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track VCCA and VCCB respectively. The VCCB pin accepts any supply voltage from 2.3 V to 5.5 V while the VCCA pin accepts any supply voltage from 1.65 V to 3.6 V such that VCCA is less than or equal to VCCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0102-Q1 device is designed so that the OE input circuit is supplied by VCCA.

To assure the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The TXS0102-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track VCCA and VCCB respectively. The VCCB pin accepts any supply voltage from 2.3 V to 5.5 V while the VCCA pin accepts any supply voltage from 1.65 V to 3.6 V such that VCCA is less than or equal to VCCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0102-Q1 device is designed so that the OE input circuit is supplied by VCCA.

To assure the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet TXS0102-Q1 2-Bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull Applications datasheet (Rev. A) PDF | HTML 27 Sep 2017
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 09 Jan 2024
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 29 Sep 2023
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 28 Jun 2023
Product overview Translate Voltages for I2C PDF | HTML 02 Jun 2022
Application brief Translate Voltages for MDIO PDF | HTML 16 Jul 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Technical article Using level shifters in automotive applications PDF | HTML 28 Mar 2016

Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
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VSSOP (DCU) 8 View options

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