Product details

Technology family TXS Applications SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
Technology family TXS Applications SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 WQFN (BQA) 14 7.5 mm² 3 x 2.5
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • No direction-control signal required
  • Maximum data rates:
    • 24 Mbps maximum (push pull)
    • 2 Mbps (open drain)
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA  ≤ V CCB)
  • No power-supply sequencing required—V CCA or V CCB can be ramped first
  • ESD protection exceeds JESD 22:
    • A Port
      • 2000-V Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
    • B Port
      • 15-kV Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
  • IEC 61000-4-2 ESD (B port)
    • ±8-kV Contact Discharge
    • ±10-kV Air-Gap Discharge
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • No direction-control signal required
  • Maximum data rates:
    • 24 Mbps maximum (push pull)
    • 2 Mbps (open drain)
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA  ≤ V CCB)
  • No power-supply sequencing required—V CCA or V CCB can be ramped first
  • ESD protection exceeds JESD 22:
    • A Port
      • 2000-V Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
    • B Port
      • 15-kV Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
  • IEC 61000-4-2 ESD (B port)
    • ±8-kV Contact Discharge
    • ±10-kV Air-Gap Discharge

The TXS0104E-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track V CCA and V CCB respectively. The V CCB pin accepts any supply voltage from 2.3 V to 5.5 V while the V CCA pin accepts any supply voltage from 1.65 V to 3.6 V such that V CCA is less than or equal to V CCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E-Q1 device is designed so that the OE input circuit is supplied by V CCA.

To be in the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pull down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The TXS0104E-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track V CCA and V CCB respectively. The V CCB pin accepts any supply voltage from 2.3 V to 5.5 V while the V CCA pin accepts any supply voltage from 1.65 V to 3.6 V such that V CCA is less than or equal to V CCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E-Q1 device is designed so that the OE input circuit is supplied by V CCA.

To be in the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pull down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet TXS0104E-Q1 Automotive 4-Bit Bidirectional Voltage-Level Translatorfor Open-Drain and Push-Pull Applications datasheet (Rev. E) PDF | HTML 03 Oct 2023
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 29 Sep 2023
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 05 Sep 2023
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 28 Jun 2023
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
More literature Automotive Logic Devices Brochure 27 Aug 2014

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Package Pins Download
TSSOP (PW) 14 View options
UQFN (RUT) 12 View options
WQFN (BQA) 14 View options

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