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UC1710-SP

ACTIVE

Space-grade QMLV, 6-A/6-A single-channel gate driver with 5-V UVLO and split ground

Product details

Number of channels 1 Power switch IGBT, MOSFET Peak output current (A) 6 Input supply voltage (min) (V) 4.7 Input supply voltage (max) (V) 18 Features Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 20 Input threshold CMOS Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Complementary
Number of channels 1 Power switch IGBT, MOSFET Peak output current (A) 6 Input supply voltage (min) (V) 4.7 Input supply voltage (max) (V) 18 Features Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 20 Input threshold CMOS Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Complementary
CDIP (JG) 8 64.032 mm² 9.6 x 6.67
  • Totem Pole Output with 6A Source/Sink Drive
  • 3ns Delay
  • 20ns Rise and Fall Time into 2.2nF
  • 8ns Rise and Fall Time into 30nF
  • 4.7V to 18V Operation
  • Inverting and Non-Inverting Outputs
  • Under-Voltage Lockout with Hysteresis
  • Thermal Shutdown Protection
  • MINIDIP and Power Packages
  • Totem Pole Output with 6A Source/Sink Drive
  • 3ns Delay
  • 20ns Rise and Fall Time into 2.2nF
  • 8ns Rise and Fall Time into 30nF
  • 4.7V to 18V Operation
  • Inverting and Non-Inverting Outputs
  • Under-Voltage Lockout with Hysteresis
  • Thermal Shutdown Protection
  • MINIDIP and Power Packages

The UC1710 family of FET drivers is made with a high-speed Schottky process to interface between low-level control functions and very high-power switching devices-particularly power MOSFET\x92s. These devices accept low-current digital inputs to activate a high-current, totem pole output which can source or sink a minimum of 6A.

Supply voltages for both VIN and VC can independently range from 4.7V to 18V. These devices also feature under-voltage lockout with hysteresis.

The UC1710 is packaged in an 8-pin hermetically sealed dual in-line package for \x9655°C to +125°C operation. The UC2710 and UC3710 are specified for a temperature range of \x9640°C to +85°C and 0°C to +70°C respectively and are available in either an 8-pin plastic dual in-line or a 5-pin, TO-220 package. Surface mount devices are also available.

The UC1710 family of FET drivers is made with a high-speed Schottky process to interface between low-level control functions and very high-power switching devices-particularly power MOSFET\x92s. These devices accept low-current digital inputs to activate a high-current, totem pole output which can source or sink a minimum of 6A.

Supply voltages for both VIN and VC can independently range from 4.7V to 18V. These devices also feature under-voltage lockout with hysteresis.

The UC1710 is packaged in an 8-pin hermetically sealed dual in-line package for \x9655°C to +125°C operation. The UC2710 and UC3710 are specified for a temperature range of \x9640°C to +85°C and 0°C to +70°C respectively and are available in either an 8-pin plastic dual in-line or a 5-pin, TO-220 package. Surface mount devices are also available.

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Technical documentation

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Type Title Date
* Data sheet High Current FET Driver datasheet 05 Sep 1999
* SMD UC1710-SP SMD 5962-01520 08 Jul 2016
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 Aug 2023
Application note QML flow, its importance, and obtaining lot information (Rev. C) 30 Aug 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Oct 2022
Selection guide TI Space Products (Rev. I) 03 Mar 2022
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 21 Aug 2020
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form PDF | HTML 18 May 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
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E-book Radiation Handbook for Electronics (Rev. A) 21 May 2019

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CDIP (JG) 8 View options

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